Path: blob/master/arch/m68k/platform/68328/head-rom.S
10819 views
1.global _start2.global _stext34.global _rambase5.global _ramvec6.global _ramstart7.global _ramend89#ifdef CONFIG_INIT_LCD10.global splash_bits11#endif1213.data1415/*16* Set up the usable of RAM stuff. Size of RAM is determined then17* an initial stack set up at the end.18*/19.align 420_ramvec:21.long 022_rambase:23.long 024_ramstart:25.long 026_ramend:27.long 02829#define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE)3031#ifdef CONFIG_INIT_LCD32splash_bits:33#include "bootlogo.rh"34#endif3536.text37_start:38_stext: movew #0x2700,%sr39#ifdef CONFIG_INIT_LCD40movel #splash_bits, 0xfffffA00 /* LSSA */41moveb #0x28, 0xfffffA05 /* LVPW */42movew #0x280, 0xFFFFFa08 /* LXMAX */43movew #0x1df, 0xFFFFFa0a /* LYMAX */44moveb #0, 0xfffffa29 /* LBAR */45moveb #0, 0xfffffa25 /* LPXCD */46moveb #0x08, 0xFFFFFa20 /* LPICF */47moveb #0x01, 0xFFFFFA21 /* -ve pol */48moveb #0x81, 0xfffffA27 /* LCKCON */49movew #0xff00, 0xfffff412 /* LCD pins */50#endif51moveal #RAMEND-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp52movew #32767, %d0 /* PLL settle wait loop */531: subq #1, %d054bne 1b5556/* Copy data segment from ROM to RAM */57moveal #_etext, %a058moveal #_sdata, %a159moveal #_edata, %a26061/* Copy %a0 to %a1 until %a1 == %a2 */621: movel %a0@+, %a1@+63cmpal %a1, %a264bhi 1b6566moveal #_sbss, %a067moveal #_ebss, %a168/* Copy 0 to %a0 until %a0 == %a1 */69701:71clrl %a0@+72cmpal %a0, %a173bhi 1b7475movel #_sdata, %d076movel %d0, _rambase77movel #_ebss, %d078movel %d0, _ramstart79movel #RAMEND-CONFIG_MEMORY_RESERVE*0x100000, %d080movel %d0, _ramend81movel #CONFIG_VECTORBASE, %d082movel %d0, _ramvec8384/*85* load the current task pointer and stack86*/87lea init_thread_union, %a088lea 0x2000(%a0), %sp89901: jsr start_kernel91bra 1b92_exit:9394jmp _exit959697putc:98moveb %d7,0xfffff907991:100movew 0xfffff906, %d7101andw #0x2000, %d7102beq 1b103rts104105.data106env:107.long 0108.text109110111112