Path: blob/master/arch/m68k/platform/coldfire/dma_timer.c
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/*1* dma_timer.c -- Freescale ColdFire DMA Timer.2*3* Copyright (C) 2007, Benedikt Spranger <[email protected]>4* Copyright (C) 2008. Sebastian Siewior, Linutronix5*6*/78#include <linux/clocksource.h>9#include <linux/io.h>1011#include <asm/machdep.h>12#include <asm/coldfire.h>13#include <asm/mcfpit.h>14#include <asm/mcfsim.h>1516#define DMA_TIMER_0 (0x00)17#define DMA_TIMER_1 (0x40)18#define DMA_TIMER_2 (0x80)19#define DMA_TIMER_3 (0xc0)2021#define DTMR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x400)22#define DTXMR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x402)23#define DTER0 (MCF_IPSBAR + DMA_TIMER_0 + 0x403)24#define DTRR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x404)25#define DTCR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x408)26#define DTCN0 (MCF_IPSBAR + DMA_TIMER_0 + 0x40c)2728#define DMA_FREQ ((MCF_CLK / 2) / 16)2930/* DTMR */31#define DMA_DTMR_RESTART (1 << 3)32#define DMA_DTMR_CLK_DIV_1 (1 << 1)33#define DMA_DTMR_CLK_DIV_16 (2 << 1)34#define DMA_DTMR_ENABLE (1 << 0)3536static cycle_t cf_dt_get_cycles(struct clocksource *cs)37{38return __raw_readl(DTCN0);39}4041static struct clocksource clocksource_cf_dt = {42.name = "coldfire_dma_timer",43.rating = 200,44.read = cf_dt_get_cycles,45.mask = CLOCKSOURCE_MASK(32),46.shift = 20,47.flags = CLOCK_SOURCE_IS_CONTINUOUS,48};4950static int __init init_cf_dt_clocksource(void)51{52/*53* We setup DMA timer 0 in free run mode. This incrementing counter is54* used as a highly precious clock source. With MCF_CLOCK = 150 MHz we55* get a ~213 ns resolution and the 32bit register will overflow almost56* every 15 minutes.57*/58__raw_writeb(0x00, DTXMR0);59__raw_writeb(0x00, DTER0);60__raw_writel(0x00000000, DTRR0);61__raw_writew(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0);62clocksource_cf_dt.mult = clocksource_hz2mult(DMA_FREQ,63clocksource_cf_dt.shift);64return clocksource_register(&clocksource_cf_dt);65}6667arch_initcall(init_cf_dt_clocksource);6869#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */70#define CYC2NS_SCALE ((1000000 << CYC2NS_SCALE_FACTOR) / (DMA_FREQ / 1000))7172static unsigned long long cycles2ns(unsigned long cycl)73{74return (unsigned long long) ((unsigned long long)cycl *75CYC2NS_SCALE) >> CYC2NS_SCALE_FACTOR;76}7778unsigned long long sched_clock(void)79{80unsigned long cycl = __raw_readl(DTCN0);8182return cycles2ns(cycl);83}848586