Path: blob/master/arch/microblaze/include/asm/cacheflush.h
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/*1* Copyright (C) 2007-2009 Michal Simek <[email protected]>2* Copyright (C) 2007-2009 PetaLogix3* Copyright (C) 2007 John Williams <[email protected]>4* based on v850 version which was5* Copyright (C) 2001,02,03 NEC Electronics Corporation6* Copyright (C) 2001,02,03 Miles Bader <[email protected]>7*8* This file is subject to the terms and conditions of the GNU General9* Public License. See the file COPYING in the main directory of this10* archive for more details.11*12*/1314#ifndef _ASM_MICROBLAZE_CACHEFLUSH_H15#define _ASM_MICROBLAZE_CACHEFLUSH_H1617/* Somebody depends on this; sigh... */18#include <linux/mm.h>19#include <linux/io.h>2021/* Look at Documentation/cachetlb.txt */2223/*24* Cache handling functions.25* Microblaze has a write-through data cache, meaning that the data cache26* never needs to be flushed. The only flushing operations that are27* implemented are to invalidate the instruction cache. These are called28* after loading a user application into memory, we must invalidate the29* instruction cache to make sure we don't fetch old, bad code.30*/3132/* struct cache, d=dcache, i=icache, fl = flush, iv = invalidate,33* suffix r = range */34struct scache {35/* icache */36void (*ie)(void); /* enable */37void (*id)(void); /* disable */38void (*ifl)(void); /* flush */39void (*iflr)(unsigned long a, unsigned long b);40void (*iin)(void); /* invalidate */41void (*iinr)(unsigned long a, unsigned long b);42/* dcache */43void (*de)(void); /* enable */44void (*dd)(void); /* disable */45void (*dfl)(void); /* flush */46void (*dflr)(unsigned long a, unsigned long b);47void (*din)(void); /* invalidate */48void (*dinr)(unsigned long a, unsigned long b);49};5051/* microblaze cache */52extern struct scache *mbc;5354void microblaze_cache_init(void);5556#define enable_icache() mbc->ie();57#define disable_icache() mbc->id();58#define flush_icache() mbc->ifl();59#define flush_icache_range(start, end) mbc->iflr(start, end);60#define invalidate_icache() mbc->iin();61#define invalidate_icache_range(start, end) mbc->iinr(start, end);6263#define flush_icache_user_range(vma, pg, adr, len) flush_icache();64#define flush_icache_page(vma, pg) do { } while (0)6566#define enable_dcache() mbc->de();67#define disable_dcache() mbc->dd();68/* FIXME for LL-temac driver */69#define invalidate_dcache() mbc->din();70#define invalidate_dcache_range(start, end) mbc->dinr(start, end);71#define flush_dcache() mbc->dfl();72#define flush_dcache_range(start, end) mbc->dflr(start, end);7374#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 175/* MS: We have to implement it because of rootfs-jffs2 issue on WB */76#define flush_dcache_page(page) \77do { \78unsigned long addr = (unsigned long) page_address(page); /* virtual */ \79addr = (u32)virt_to_phys((void *)addr); \80flush_dcache_range((unsigned) (addr), (unsigned) (addr) + PAGE_SIZE); \81} while (0);8283#define flush_dcache_mmap_lock(mapping) do { } while (0)84#define flush_dcache_mmap_unlock(mapping) do { } while (0)8586#define flush_cache_dup_mm(mm) do { } while (0)87#define flush_cache_vmap(start, end) do { } while (0)88#define flush_cache_vunmap(start, end) do { } while (0)89#define flush_cache_mm(mm) do { } while (0)9091#define flush_cache_page(vma, vmaddr, pfn) \92flush_dcache_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE);9394/* MS: kgdb code use this macro, wrong len with FLASH */95#if 096#define flush_cache_range(vma, start, len) { \97flush_icache_range((unsigned) (start), (unsigned) (start) + (len)); \98flush_dcache_range((unsigned) (start), (unsigned) (start) + (len)); \99}100#endif101102#define flush_cache_range(vma, start, len) do { } while (0)103104#define copy_to_user_page(vma, page, vaddr, dst, src, len) \105do { \106u32 addr = virt_to_phys(dst); \107memcpy((dst), (src), (len)); \108if (vma->vm_flags & VM_EXEC) { \109invalidate_icache_range((unsigned) (addr), \110(unsigned) (addr) + PAGE_SIZE); \111flush_dcache_range((unsigned) (addr), \112(unsigned) (addr) + PAGE_SIZE); \113} \114} while (0)115116#define copy_from_user_page(vma, page, vaddr, dst, src, len) \117do { \118memcpy((dst), (src), (len)); \119} while (0)120121#endif /* _ASM_MICROBLAZE_CACHEFLUSH_H */122123124