Path: blob/master/arch/microblaze/include/asm/futex.h
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#ifndef _ASM_MICROBLAZE_FUTEX_H1#define _ASM_MICROBLAZE_FUTEX_H23#ifdef __KERNEL__45#include <linux/futex.h>6#include <linux/uaccess.h>7#include <asm/errno.h>89#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \10({ \11__asm__ __volatile__ ( \12"1: lwx %0, %2, r0; " \13insn \14"2: swx %1, %2, r0; \15addic %1, r0, 0; \16bnei %1, 1b; \173: \18.section .fixup,\"ax\"; \194: brid 3b; \20addik %1, r0, %3; \21.previous; \22.section __ex_table,\"a\"; \23.word 1b,4b,2b,4b; \24.previous;" \25: "=&r" (oldval), "=&r" (ret) \26: "b" (uaddr), "i" (-EFAULT), "r" (oparg) \27); \28})2930static inline int31futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)32{33int op = (encoded_op >> 28) & 7;34int cmp = (encoded_op >> 24) & 15;35int oparg = (encoded_op << 8) >> 20;36int cmparg = (encoded_op << 20) >> 20;37int oldval = 0, ret;38if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))39oparg = 1 << oparg;4041if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))42return -EFAULT;4344pagefault_disable();4546switch (op) {47case FUTEX_OP_SET:48__futex_atomic_op("or %1,%4,%4;", ret, oldval, uaddr, oparg);49break;50case FUTEX_OP_ADD:51__futex_atomic_op("add %1,%0,%4;", ret, oldval, uaddr, oparg);52break;53case FUTEX_OP_OR:54__futex_atomic_op("or %1,%0,%4;", ret, oldval, uaddr, oparg);55break;56case FUTEX_OP_ANDN:57__futex_atomic_op("andn %1,%0,%4;", ret, oldval, uaddr, oparg);58break;59case FUTEX_OP_XOR:60__futex_atomic_op("xor %1,%0,%4;", ret, oldval, uaddr, oparg);61break;62default:63ret = -ENOSYS;64}6566pagefault_enable();6768if (!ret) {69switch (cmp) {70case FUTEX_OP_CMP_EQ:71ret = (oldval == cmparg);72break;73case FUTEX_OP_CMP_NE:74ret = (oldval != cmparg);75break;76case FUTEX_OP_CMP_LT:77ret = (oldval < cmparg);78break;79case FUTEX_OP_CMP_GE:80ret = (oldval >= cmparg);81break;82case FUTEX_OP_CMP_LE:83ret = (oldval <= cmparg);84break;85case FUTEX_OP_CMP_GT:86ret = (oldval > cmparg);87break;88default:89ret = -ENOSYS;90}91}92return ret;93}9495static inline int96futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,97u32 oldval, u32 newval)98{99int ret = 0, cmp;100u32 prev;101102if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))103return -EFAULT;104105__asm__ __volatile__ ("1: lwx %1, %3, r0; \106cmp %2, %1, %4; \107beqi %2, 3f; \1082: swx %5, %3, r0; \109addic %2, r0, 0; \110bnei %2, 1b; \1113: \112.section .fixup,\"ax\"; \1134: brid 3b; \114addik %0, r0, %6; \115.previous; \116.section __ex_table,\"a\"; \117.word 1b,4b,2b,4b; \118.previous;" \119: "+r" (ret), "=&r" (prev), "=&r"(cmp) \120: "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT));121122*uval = prev;123return ret;124}125126#endif /* __KERNEL__ */127128#endif129130131