Path: blob/master/arch/microblaze/include/asm/io.h
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/*1* Copyright (C) 2007-2009 Michal Simek <[email protected]>2* Copyright (C) 2007-2009 PetaLogix3* Copyright (C) 2006 Atmark Techno, Inc.4*5* This file is subject to the terms and conditions of the GNU General Public6* License. See the file "COPYING" in the main directory of this archive7* for more details.8*/910#ifndef _ASM_MICROBLAZE_IO_H11#define _ASM_MICROBLAZE_IO_H1213#include <asm/byteorder.h>14#include <asm/page.h>15#include <linux/types.h>16#include <linux/mm.h> /* Get struct page {...} */17#include <asm-generic/iomap.h>1819#ifndef CONFIG_PCI20#define _IO_BASE 021#define _ISA_MEM_BASE 022#define PCI_DRAM_OFFSET 023#else24#define _IO_BASE isa_io_base25#define _ISA_MEM_BASE isa_mem_base26#define PCI_DRAM_OFFSET pci_dram_offset27#endif2829extern unsigned long isa_io_base;30extern unsigned long pci_io_base;31extern unsigned long pci_dram_offset;3233extern resource_size_t isa_mem_base;3435#define IO_SPACE_LIMIT (0xFFFFFFFF)3637static inline unsigned char __raw_readb(const volatile void __iomem *addr)38{39return *(volatile unsigned char __force *)addr;40}41static inline unsigned short __raw_readw(const volatile void __iomem *addr)42{43return *(volatile unsigned short __force *)addr;44}45static inline unsigned int __raw_readl(const volatile void __iomem *addr)46{47return *(volatile unsigned int __force *)addr;48}49static inline unsigned long __raw_readq(const volatile void __iomem *addr)50{51return *(volatile unsigned long __force *)addr;52}53static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)54{55*(volatile unsigned char __force *)addr = v;56}57static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)58{59*(volatile unsigned short __force *)addr = v;60}61static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)62{63*(volatile unsigned int __force *)addr = v;64}65static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)66{67*(volatile unsigned long __force *)addr = v;68}6970/*71* read (readb, readw, readl, readq) and write (writeb, writew,72* writel, writeq) accessors are for PCI and thus little endian.73* Linux 2.4 for Microblaze had this wrong.74*/75static inline unsigned char readb(const volatile void __iomem *addr)76{77return *(volatile unsigned char __force *)addr;78}79static inline unsigned short readw(const volatile void __iomem *addr)80{81return le16_to_cpu(*(volatile unsigned short __force *)addr);82}83static inline unsigned int readl(const volatile void __iomem *addr)84{85return le32_to_cpu(*(volatile unsigned int __force *)addr);86}87static inline void writeb(unsigned char v, volatile void __iomem *addr)88{89*(volatile unsigned char __force *)addr = v;90}91static inline void writew(unsigned short v, volatile void __iomem *addr)92{93*(volatile unsigned short __force *)addr = cpu_to_le16(v);94}95static inline void writel(unsigned int v, volatile void __iomem *addr)96{97*(volatile unsigned int __force *)addr = cpu_to_le32(v);98}99100/* ioread and iowrite variants. thease are for now same as __raw_101* variants of accessors. we might check for endianess in the feature102*/103#define ioread8(addr) __raw_readb((u8 *)(addr))104#define ioread16(addr) __raw_readw((u16 *)(addr))105#define ioread32(addr) __raw_readl((u32 *)(addr))106#define iowrite8(v, addr) __raw_writeb((u8)(v), (u8 *)(addr))107#define iowrite16(v, addr) __raw_writew((u16)(v), (u16 *)(addr))108#define iowrite32(v, addr) __raw_writel((u32)(v), (u32 *)(addr))109110#define ioread16be(addr) __raw_readw((u16 *)(addr))111#define ioread32be(addr) __raw_readl((u32 *)(addr))112#define iowrite16be(v, addr) __raw_writew((u16)(v), (u16 *)(addr))113#define iowrite32be(v, addr) __raw_writel((u32)(v), (u32 *)(addr))114115/* These are the definitions for the x86 IO instructions116* inb/inw/inl/outb/outw/outl, the "string" versions117* insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions118* inb_p/inw_p/...119* The macros don't do byte-swapping.120*/121#define inb(port) readb((u8 *)((port)))122#define outb(val, port) writeb((val), (u8 *)((unsigned long)(port)))123#define inw(port) readw((u16 *)((port)))124#define outw(val, port) writew((val), (u16 *)((unsigned long)(port)))125#define inl(port) readl((u32 *)((port)))126#define outl(val, port) writel((val), (u32 *)((unsigned long)(port)))127128#define inb_p(port) inb((port))129#define outb_p(val, port) outb((val), (port))130#define inw_p(port) inw((port))131#define outw_p(val, port) outw((val), (port))132#define inl_p(port) inl((port))133#define outl_p(val, port) outl((val), (port))134135#define memset_io(a, b, c) memset((void *)(a), (b), (c))136#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))137#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))138139#ifdef CONFIG_MMU140141#define phys_to_virt(addr) ((void *)__phys_to_virt(addr))142#define virt_to_phys(addr) ((unsigned long)__virt_to_phys(addr))143#define virt_to_bus(addr) ((unsigned long)__virt_to_phys(addr))144145#define page_to_bus(page) (page_to_phys(page))146#define bus_to_virt(addr) (phys_to_virt(addr))147148extern void iounmap(void *addr);149/*extern void *__ioremap(phys_addr_t address, unsigned long size,150unsigned long flags);*/151extern void __iomem *ioremap(phys_addr_t address, unsigned long size);152#define ioremap_writethrough(addr, size) ioremap((addr), (size))153#define ioremap_nocache(addr, size) ioremap((addr), (size))154#define ioremap_fullcache(addr, size) ioremap((addr), (size))155156#else /* CONFIG_MMU */157158/**159* virt_to_phys - map virtual addresses to physical160* @address: address to remap161*162* The returned physical address is the physical (CPU) mapping for163* the memory address given. It is only valid to use this function on164* addresses directly mapped or allocated via kmalloc.165*166* This function does not give bus mappings for DMA transfers. In167* almost all conceivable cases a device driver should not be using168* this function169*/170static inline unsigned long __iomem virt_to_phys(volatile void *address)171{172return __pa((unsigned long)address);173}174175#define virt_to_bus virt_to_phys176177/**178* phys_to_virt - map physical address to virtual179* @address: address to remap180*181* The returned virtual address is a current CPU mapping for182* the memory address given. It is only valid to use this function on183* addresses that have a kernel mapping184*185* This function does not handle bus mappings for DMA transfers. In186* almost all conceivable cases a device driver should not be using187* this function188*/189static inline void *phys_to_virt(unsigned long address)190{191return (void *)__va(address);192}193194#define bus_to_virt(a) phys_to_virt(a)195196static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,197unsigned long flags)198{199return (void *)address;200}201202#define ioremap(physaddr, size) ((void __iomem *)(unsigned long)(physaddr))203#define iounmap(addr) ((void)0)204#define ioremap_nocache(physaddr, size) ioremap(physaddr, size)205206#endif /* CONFIG_MMU */207208/*209* Convert a physical pointer to a virtual kernel pointer for /dev/mem210* access211*/212#define xlate_dev_mem_ptr(p) __va(p)213214/*215* Convert a virtual cached pointer to an uncached pointer216*/217#define xlate_dev_kmem_ptr(p) p218219/*220* Big Endian221*/222#define out_be32(a, v) __raw_writel((v), (void __iomem __force *)(a))223#define out_be16(a, v) __raw_writew((v), (a))224225#define in_be32(a) __raw_readl((const void __iomem __force *)(a))226#define in_be16(a) __raw_readw(a)227228#define writel_be(v, a) out_be32((__force unsigned *)a, v)229#define readl_be(a) in_be32((__force unsigned *)a)230231/*232* Little endian233*/234235#define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a))236#define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a))237238#define in_le32(a) __le32_to_cpu(__raw_readl(a))239#define in_le16(a) __le16_to_cpu(__raw_readw(a))240241/* Byte ops */242#define out_8(a, v) __raw_writeb((v), (a))243#define in_8(a) __raw_readb(a)244245#define mmiowb()246247#define ioport_map(port, nr) ((void __iomem *)(port))248#define ioport_unmap(addr)249250#endif /* _ASM_MICROBLAZE_IO_H */251252253