Path: blob/master/arch/mips/alchemy/common/gpiolib-au1000.c
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/*1* Copyright (C) 2007-2009, OpenWrt.org, Florian Fainelli <[email protected]>2* GPIOLIB support for Au1000, Au1500, Au1100, Au1550 and Au12x0.3*4* This program is free software; you can redistribute it and/or modify it5* under the terms of the GNU General Public License as published by the6* Free Software Foundation; either version 2 of the License, or (at your7* option) any later version.8*9* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED10* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF11* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN12* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,13* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT14* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF15* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON16* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT17* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF18* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.19*20* You should have received a copy of the GNU General Public License along21* with this program; if not, write to the Free Software Foundation, Inc.,22* 675 Mass Ave, Cambridge, MA 02139, USA.23*24* Notes :25* au1000 SoC have only one GPIO block : GPIO126* Au1100, Au15x0, Au12x0 have a second one : GPIO227*/2829#include <linux/kernel.h>30#include <linux/module.h>31#include <linux/types.h>32#include <linux/platform_device.h>33#include <linux/gpio.h>3435#include <asm/mach-au1x00/au1000.h>36#include <asm/mach-au1x00/gpio.h>3738static int gpio2_get(struct gpio_chip *chip, unsigned offset)39{40return alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE);41}4243static void gpio2_set(struct gpio_chip *chip, unsigned offset, int value)44{45alchemy_gpio2_set_value(offset + ALCHEMY_GPIO2_BASE, value);46}4748static int gpio2_direction_input(struct gpio_chip *chip, unsigned offset)49{50return alchemy_gpio2_direction_input(offset + ALCHEMY_GPIO2_BASE);51}5253static int gpio2_direction_output(struct gpio_chip *chip, unsigned offset,54int value)55{56return alchemy_gpio2_direction_output(offset + ALCHEMY_GPIO2_BASE,57value);58}5960static int gpio2_to_irq(struct gpio_chip *chip, unsigned offset)61{62return alchemy_gpio2_to_irq(offset + ALCHEMY_GPIO2_BASE);63}646566static int gpio1_get(struct gpio_chip *chip, unsigned offset)67{68return alchemy_gpio1_get_value(offset + ALCHEMY_GPIO1_BASE);69}7071static void gpio1_set(struct gpio_chip *chip,72unsigned offset, int value)73{74alchemy_gpio1_set_value(offset + ALCHEMY_GPIO1_BASE, value);75}7677static int gpio1_direction_input(struct gpio_chip *chip, unsigned offset)78{79return alchemy_gpio1_direction_input(offset + ALCHEMY_GPIO1_BASE);80}8182static int gpio1_direction_output(struct gpio_chip *chip,83unsigned offset, int value)84{85return alchemy_gpio1_direction_output(offset + ALCHEMY_GPIO1_BASE,86value);87}8889static int gpio1_to_irq(struct gpio_chip *chip, unsigned offset)90{91return alchemy_gpio1_to_irq(offset + ALCHEMY_GPIO1_BASE);92}9394struct gpio_chip alchemy_gpio_chip[] = {95[0] = {96.label = "alchemy-gpio1",97.direction_input = gpio1_direction_input,98.direction_output = gpio1_direction_output,99.get = gpio1_get,100.set = gpio1_set,101.to_irq = gpio1_to_irq,102.base = ALCHEMY_GPIO1_BASE,103.ngpio = ALCHEMY_GPIO1_NUM,104},105[1] = {106.label = "alchemy-gpio2",107.direction_input = gpio2_direction_input,108.direction_output = gpio2_direction_output,109.get = gpio2_get,110.set = gpio2_set,111.to_irq = gpio2_to_irq,112.base = ALCHEMY_GPIO2_BASE,113.ngpio = ALCHEMY_GPIO2_NUM,114},115};116117static int __init alchemy_gpiolib_init(void)118{119gpiochip_add(&alchemy_gpio_chip[0]);120if (alchemy_get_cputype() != ALCHEMY_CPU_AU1000)121gpiochip_add(&alchemy_gpio_chip[1]);122123return 0;124}125arch_initcall(alchemy_gpiolib_init);126127128