Path: blob/master/arch/mips/alchemy/devboards/pb1100/board_setup.c
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/*1* Copyright 2002, 2008 MontaVista Software Inc.2* Author: MontaVista Software, Inc. <[email protected]>3*4* This program is free software; you can redistribute it and/or modify it5* under the terms of the GNU General Public License as published by the6* Free Software Foundation; either version 2 of the License, or (at your7* option) any later version.8*9* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED10* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF11* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN12* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,13* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT14* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF15* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON16* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT17* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF18* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.19*20* You should have received a copy of the GNU General Public License along21* with this program; if not, write to the Free Software Foundation, Inc.,22* 675 Mass Ave, Cambridge, MA 02139, USA.23*/2425#include <linux/gpio.h>26#include <linux/init.h>27#include <linux/delay.h>28#include <linux/interrupt.h>2930#include <asm/mach-au1x00/au1000.h>31#include <asm/mach-db1x00/bcsr.h>3233#include <prom.h>343536const char *get_system_type(void)37{38return "Alchemy Pb1100";39}4041void __init board_setup(void)42{43volatile void __iomem *base = (volatile void __iomem *)0xac000000UL;4445bcsr_init(DB1000_BCSR_PHYS_ADDR,46DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);4748/* Set AUX clock to 12 MHz * 8 = 96 MHz */49au_writel(8, SYS_AUXPLL);50alchemy_gpio1_input_enable();51udelay(100);5253#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)54{55u32 pin_func, sys_freqctrl, sys_clksrc;5657/* Configure pins GPIO[14:9] as GPIO */58pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;5960/* Zero and disable FREQ2 */61sys_freqctrl = au_readl(SYS_FREQCTRL0);62sys_freqctrl &= ~0xFFF00000;63au_writel(sys_freqctrl, SYS_FREQCTRL0);6465/* Zero and disable USBH/USBD/IrDA clock */66sys_clksrc = au_readl(SYS_CLKSRC);67sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);68au_writel(sys_clksrc, SYS_CLKSRC);6970sys_freqctrl = au_readl(SYS_FREQCTRL0);71sys_freqctrl &= ~0xFFF00000;7273sys_clksrc = au_readl(SYS_CLKSRC);74sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);7576/* FREQ2 = aux / 2 = 48 MHz */77sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |78SYS_FC_FE2 | SYS_FC_FS2;79au_writel(sys_freqctrl, SYS_FREQCTRL0);8081/*82* Route 48 MHz FREQ2 into USBH/USBD/IrDA83*/84sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MIR_BIT;85au_writel(sys_clksrc, SYS_CLKSRC);8687/* Setup the static bus controller */88au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */89au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */90au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */9192/*93* Get USB Functionality pin state (device vs host drive pins).94*/95pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;96/* 2nd USB port is USB host. */97pin_func |= SYS_PF_USB;98au_writel(pin_func, SYS_PINFUNC);99}100#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */101102/* Enable sys bus clock divider when IDLE state or no bus activity. */103au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);104105/* Enable the RTC if not already enabled. */106if (!(readb(base + 0x28) & 0x20)) {107writeb(readb(base + 0x28) | 0x20, base + 0x28);108au_sync();109}110/* Put the clock in BCD mode. */111if (readb(base + 0x2C) & 0x4) { /* reg B */112writeb(readb(base + 0x2c) & ~0x4, base + 0x2c);113au_sync();114}115}116117static int __init pb1100_init_irq(void)118{119irq_set_irq_type(AU1100_GPIO9_INT, IRQF_TRIGGER_LOW); /* PCCD# */120irq_set_irq_type(AU1100_GPIO10_INT, IRQF_TRIGGER_LOW); /* PCSTSCHG# */121irq_set_irq_type(AU1100_GPIO11_INT, IRQF_TRIGGER_LOW); /* PCCard# */122irq_set_irq_type(AU1100_GPIO13_INT, IRQF_TRIGGER_LOW); /* DC_IRQ# */123124return 0;125}126arch_initcall(pb1100_init_irq);127128129