Path: blob/master/arch/mips/alchemy/devboards/pb1200/board_setup.c
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/*1*2* BRIEF MODULE DESCRIPTION3* Alchemy Pb1200/Db1200 board setup.4*5* This program is free software; you can redistribute it and/or modify it6* under the terms of the GNU General Public License as published by the7* Free Software Foundation; either version 2 of the License, or (at your8* option) any later version.9*10* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED11* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF12* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN13* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,14* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT15* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF16* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON17* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT18* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF19* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.20*21* You should have received a copy of the GNU General Public License along22* with this program; if not, write to the Free Software Foundation, Inc.,23* 675 Mass Ave, Cambridge, MA 02139, USA.24*/2526#include <linux/init.h>27#include <linux/interrupt.h>28#include <linux/sched.h>2930#include <asm/mach-au1x00/au1000.h>31#include <asm/mach-db1x00/bcsr.h>3233#ifdef CONFIG_MIPS_PB120034#include <asm/mach-pb1x00/pb1200.h>35#endif3637#ifdef CONFIG_MIPS_DB120038#include <asm/mach-db1x00/db1200.h>39#define PB1200_INT_BEGIN DB1200_INT_BEGIN40#define PB1200_INT_END DB1200_INT_END41#endif4243#include <prom.h>4445const char *get_system_type(void)46{47return "Alchemy Pb1200";48}4950void __init board_setup(void)51{52printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");53bcsr_init(PB1200_BCSR_PHYS_ADDR,54PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);5556#if 057{58u32 pin_func;5960/*61* Enable PSC1 SYNC for AC97. Normaly done in audio driver,62* but it is board specific code, so put it here.63*/64pin_func = au_readl(SYS_PINFUNC);65au_sync();66pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;67au_writel(pin_func, SYS_PINFUNC);6869au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */70au_sync();71}72#endif7374#if defined(CONFIG_I2C_AU1550)75{76u32 freq0, clksrc;77u32 pin_func;7879/* Select SMBus in CPLD */80bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);8182pin_func = au_readl(SYS_PINFUNC);83au_sync();84pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);85/* Set GPIOs correctly */86pin_func |= 2 << 17;87au_writel(pin_func, SYS_PINFUNC);88au_sync();8990/* The I2C driver depends on 50 MHz clock */91freq0 = au_readl(SYS_FREQCTRL0);92au_sync();93freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);94freq0 |= 3 << SYS_FC_FRDIV1_BIT;95/* 396 MHz / (3 + 1) * 2 == 49.5 MHz */96au_writel(freq0, SYS_FREQCTRL0);97au_sync();98freq0 |= SYS_FC_FE1;99au_writel(freq0, SYS_FREQCTRL0);100au_sync();101102clksrc = au_readl(SYS_CLKSRC);103au_sync();104clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);105/* Bit 22 is EXTCLK0 for PSC0 */106clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;107au_writel(clksrc, SYS_CLKSRC);108au_sync();109}110#endif111112/*113* The Pb1200 development board uses external MUX for PSC0 to114* support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI115*/116#ifdef CONFIG_I2C_AU1550117bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);118#endif119au_sync();120}121122static int __init pb1200_init_irq(void)123{124/* We have a problem with CPLD rev 3. */125if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {126printk(KERN_ERR "WARNING!!!\n");127printk(KERN_ERR "WARNING!!!\n");128printk(KERN_ERR "WARNING!!!\n");129printk(KERN_ERR "WARNING!!!\n");130printk(KERN_ERR "WARNING!!!\n");131printk(KERN_ERR "WARNING!!!\n");132printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");133printk(KERN_ERR "updated to latest revision. This software will\n");134printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");135printk(KERN_ERR "WARNING!!!\n");136printk(KERN_ERR "WARNING!!!\n");137printk(KERN_ERR "WARNING!!!\n");138printk(KERN_ERR "WARNING!!!\n");139printk(KERN_ERR "WARNING!!!\n");140printk(KERN_ERR "WARNING!!!\n");141panic("Game over. Your score is 0.");142}143144irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);145bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1200_GPIO7_INT);146147return 0;148}149arch_initcall(pb1200_init_irq);150151152int board_au1200fb_panel(void)153{154return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;155}156157int board_au1200fb_panel_init(void)158{159/* Apply power */160bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |161BCSR_BOARD_LCDBL);162/* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */163return 0;164}165166int board_au1200fb_panel_shutdown(void)167{168/* Remove power */169bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |170BCSR_BOARD_LCDBL, 0);171/* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */172return 0;173}174175176