Path: blob/master/arch/mips/alchemy/mtx-1/board_setup.c
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/*1*2* BRIEF MODULE DESCRIPTION3* 4G Systems MTX-1 board setup.4*5* Copyright 2003, 2008 MontaVista Software Inc.6* Author: MontaVista Software, Inc. <[email protected]>7* Bruno Randolf <[email protected]>8*9* This program is free software; you can redistribute it and/or modify it10* under the terms of the GNU General Public License as published by the11* Free Software Foundation; either version 2 of the License, or (at your12* option) any later version.13*14* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED15* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF16* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN17* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,18* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT19* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF20* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON21* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT22* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF23* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.24*25* You should have received a copy of the GNU General Public License along26* with this program; if not, write to the Free Software Foundation, Inc.,27* 675 Mass Ave, Cambridge, MA 02139, USA.28*/2930#include <linux/gpio.h>31#include <linux/init.h>32#include <linux/interrupt.h>33#include <linux/pm.h>3435#include <asm/reboot.h>36#include <asm/mach-au1x00/au1000.h>3738#include <prom.h>3940char irq_tab_alchemy[][5] __initdata = {41[0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 00 - AdapterA-Slot0 (top) */42[1] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */43[2] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 02 - AdapterB-Slot0 (top) */44[3] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */45[4] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 04 - AdapterC-Slot0 (top) */46[5] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */47[6] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 06 - AdapterD-Slot0 (top) */48[7] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */49};5051extern int (*board_pci_idsel)(unsigned int devsel, int assert);52int mtx1_pci_idsel(unsigned int devsel, int assert);5354static void mtx1_reset(char *c)55{56/* Jump to the reset vector */57__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));58}5960static void mtx1_power_off(void)61{62while (1)63asm volatile (64" .set mips32 \n"65" wait \n"66" .set mips0 \n");67}6869void __init board_setup(void)70{71#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)72/* Enable USB power switch */73alchemy_gpio_direction_output(204, 0);74#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */7576#ifdef CONFIG_PCI77#if defined(__MIPSEB__)78au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);79#else80au_writel(0xf, Au1500_PCI_CFG);81#endif82board_pci_idsel = mtx1_pci_idsel;83#endif8485/* Initialize sys_pinfunc */86au_writel(SYS_PF_NI2, SYS_PINFUNC);8788/* Initialize GPIO */89au_writel(~0, KSEG1ADDR(AU1000_SYS_PHYS_ADDR) + SYS_TRIOUTCLR);90alchemy_gpio_direction_output(0, 0); /* Disable M66EN (PCI 66MHz) */91alchemy_gpio_direction_output(3, 1); /* Disable PCI CLKRUN# */92alchemy_gpio_direction_output(1, 1); /* Enable EXT_IO3 */93alchemy_gpio_direction_output(5, 0); /* Disable eth PHY TX_ER */9495/* Enable LED and set it to green */96alchemy_gpio_direction_output(211, 1); /* green on */97alchemy_gpio_direction_output(212, 0); /* red off */9899pm_power_off = mtx1_power_off;100_machine_halt = mtx1_power_off;101_machine_restart = mtx1_reset;102103printk(KERN_INFO "4G Systems MTX-1 Board\n");104}105106int107mtx1_pci_idsel(unsigned int devsel, int assert)108{109/* This function is only necessary to support a proprietary Cardbus110* adapter on the mtx-1 "singleboard" variant. It triggers a custom111* logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals.112*/113if (assert && devsel != 0)114/* Suppress signal to Cardbus */115alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */116else117alchemy_gpio_set_value(1, 1); /* set EXT_IO3 ON */118119udelay(1);120return 1;121}122123static int __init mtx1_init_irq(void)124{125irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH);126irq_set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW);127irq_set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW);128irq_set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW);129irq_set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW);130131return 0;132}133arch_initcall(mtx1_init_irq);134135136