Path: blob/master/arch/mips/alchemy/xxs1500/board_setup.c
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/*1* Copyright 2000-2003, 2008 MontaVista Software Inc.2* Author: MontaVista Software, Inc. <[email protected]>3*4* This program is free software; you can redistribute it and/or modify it5* under the terms of the GNU General Public License as published by the6* Free Software Foundation; either version 2 of the License, or (at your7* option) any later version.8*9* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED10* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF11* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN12* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,13* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT14* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF15* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON16* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT17* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF18* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.19*20* You should have received a copy of the GNU General Public License along21* with this program; if not, write to the Free Software Foundation, Inc.,22* 675 Mass Ave, Cambridge, MA 02139, USA.23*/2425#include <linux/gpio.h>26#include <linux/init.h>27#include <linux/interrupt.h>28#include <linux/delay.h>29#include <linux/pm.h>3031#include <asm/reboot.h>32#include <asm/mach-au1x00/au1000.h>3334#include <prom.h>3536static void xxs1500_reset(char *c)37{38/* Jump to the reset vector */39__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));40}4142static void xxs1500_power_off(void)43{44while (1)45asm volatile (46" .set mips32 \n"47" wait \n"48" .set mips0 \n");49}5051void __init board_setup(void)52{53u32 pin_func;5455pm_power_off = xxs1500_power_off;56_machine_halt = xxs1500_power_off;57_machine_restart = xxs1500_reset;5859alchemy_gpio1_input_enable();60alchemy_gpio2_enable();6162/* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */63pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;64pin_func |= SYS_PF_UR3;65au_writel(pin_func, SYS_PINFUNC);6667/* Enable UART */68alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);69/* Enable DTR (MCR bit 0) = USB power up */70__raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));71wmb();7273#ifdef CONFIG_PCI74#if defined(__MIPSEB__)75au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);76#else77au_writel(0xf, Au1500_PCI_CFG);78#endif79#endif80}8182static int __init xxs1500_init_irq(void)83{84irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH);85irq_set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW);86irq_set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW);87irq_set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW);88irq_set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW);89irq_set_irq_type(AU1500_GPIO207_INT, IRQF_TRIGGER_LOW);9091irq_set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW);92irq_set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW);93irq_set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW);94irq_set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW);95irq_set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* CF irq */96irq_set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW);9798return 0;99}100arch_initcall(xxs1500_init_irq);101102103