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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/mips/ath79/common.c
10817 views
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/*

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 *  Atheros AR71XX/AR724X/AR913X common routines

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 *

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 *  Copyright (C) 2008-2010 Gabor Juhos <[email protected]>

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 *  Copyright (C) 2008 Imre Kaloz <[email protected]>

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 *

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 *  This program is free software; you can redistribute it and/or modify it

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 *  under the terms of the GNU General Public License version 2 as published

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 *  by the Free Software Foundation.

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 */

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#include <linux/kernel.h>

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#include <linux/module.h>

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#include <linux/types.h>

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#include <linux/spinlock.h>

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#include <asm/mach-ath79/ath79.h>

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#include <asm/mach-ath79/ar71xx_regs.h>

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#include "common.h"

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static DEFINE_SPINLOCK(ath79_device_reset_lock);

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u32 ath79_cpu_freq;

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EXPORT_SYMBOL_GPL(ath79_cpu_freq);

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u32 ath79_ahb_freq;

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EXPORT_SYMBOL_GPL(ath79_ahb_freq);

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u32 ath79_ddr_freq;

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EXPORT_SYMBOL_GPL(ath79_ddr_freq);

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enum ath79_soc_type ath79_soc;

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void __iomem *ath79_pll_base;

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void __iomem *ath79_reset_base;

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EXPORT_SYMBOL_GPL(ath79_reset_base);

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void __iomem *ath79_ddr_base;

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void ath79_ddr_wb_flush(u32 reg)

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{

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	void __iomem *flush_reg = ath79_ddr_base + reg;

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	/* Flush the DDR write buffer. */

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	__raw_writel(0x1, flush_reg);

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	while (__raw_readl(flush_reg) & 0x1)

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		;

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	/* It must be run twice. */

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	__raw_writel(0x1, flush_reg);

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	while (__raw_readl(flush_reg) & 0x1)

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		;

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}

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EXPORT_SYMBOL_GPL(ath79_ddr_wb_flush);

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void ath79_device_reset_set(u32 mask)

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{

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	unsigned long flags;

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	u32 reg;

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	u32 t;

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	if (soc_is_ar71xx())

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		reg = AR71XX_RESET_REG_RESET_MODULE;

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	else if (soc_is_ar724x())

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		reg = AR724X_RESET_REG_RESET_MODULE;

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	else if (soc_is_ar913x())

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		reg = AR913X_RESET_REG_RESET_MODULE;

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	else

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		BUG();

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	spin_lock_irqsave(&ath79_device_reset_lock, flags);

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	t = ath79_reset_rr(reg);

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	ath79_reset_wr(reg, t | mask);

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	spin_unlock_irqrestore(&ath79_device_reset_lock, flags);

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}

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EXPORT_SYMBOL_GPL(ath79_device_reset_set);

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void ath79_device_reset_clear(u32 mask)

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{

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	unsigned long flags;

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	u32 reg;

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	u32 t;

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	if (soc_is_ar71xx())

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		reg = AR71XX_RESET_REG_RESET_MODULE;

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	else if (soc_is_ar724x())

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		reg = AR724X_RESET_REG_RESET_MODULE;

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	else if (soc_is_ar913x())

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		reg = AR913X_RESET_REG_RESET_MODULE;

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	else

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		BUG();

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	spin_lock_irqsave(&ath79_device_reset_lock, flags);

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	t = ath79_reset_rr(reg);

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	ath79_reset_wr(reg, t & ~mask);

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	spin_unlock_irqrestore(&ath79_device_reset_lock, flags);

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}

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EXPORT_SYMBOL_GPL(ath79_device_reset_clear);

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