/*1* This file is subject to the terms and conditions of the GNU General Public2* License. See the file "COPYING" in the main directory of this archive3* for more details.4*5* Copyright (C) 1996 David S. Miller ([email protected])6* Compatibility with board caches, Ulf Carlsson7*/8#include <linux/kernel.h>9#include <asm/sgialib.h>10#include <asm/bcache.h>1112/*13* IP22 boardcache is not compatible with board caches. Thus we disable it14* during romvec action. Since r4xx0.c is always compiled and linked with your15* kernel, this shouldn't cause any harm regardless what MIPS processor you16* have.17*18* The ARC write and read functions seem to interfere with the serial lines19* in some way. You should be careful with them.20*/2122void prom_putchar(char c)23{24ULONG cnt;25CHAR it = c;2627bc_disable();28ArcWrite(1, &it, 1, &cnt);29bc_enable();30}3132char prom_getchar(void)33{34ULONG cnt;35CHAR c;3637bc_disable();38ArcRead(0, &c, 1, &cnt);39bc_enable();4041return c;42}434445