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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/mips/include/asm/cacheops.h
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/*

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 * Cache operations for the cache instruction.

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 *

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 * This file is subject to the terms and conditions of the GNU General Public

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 * License.  See the file "COPYING" in the main directory of this archive

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 * for more details.

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 *

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 * (C) Copyright 1996, 97, 99, 2002, 03 Ralf Baechle

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 * (C) Copyright 1999 Silicon Graphics, Inc.

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 */

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#ifndef	__ASM_CACHEOPS_H

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#define	__ASM_CACHEOPS_H

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/*

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 * Cache Operations available on all MIPS processors with R4000-style caches

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 */

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#define Index_Invalidate_I      0x00

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#define Index_Writeback_Inv_D   0x01

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#define Index_Load_Tag_I	0x04

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#define Index_Load_Tag_D	0x05

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#define Index_Store_Tag_I	0x08

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#define Index_Store_Tag_D	0x09

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#if defined(CONFIG_CPU_LOONGSON2)

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#define Hit_Invalidate_I    	0x00

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#else

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#define Hit_Invalidate_I	0x10

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#endif

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#define Hit_Invalidate_D	0x11

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#define Hit_Writeback_Inv_D	0x15

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/*

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 * R4000-specific cacheops

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 */

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#define Create_Dirty_Excl_D	0x0d

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#define Fill			0x14

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#define Hit_Writeback_I		0x18

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#define Hit_Writeback_D		0x19

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/*

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 * R4000SC and R4400SC-specific cacheops

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 */

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#define Index_Invalidate_SI     0x02

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#define Index_Writeback_Inv_SD  0x03

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#define Index_Load_Tag_SI	0x06

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#define Index_Load_Tag_SD	0x07

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#define Index_Store_Tag_SI	0x0A

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#define Index_Store_Tag_SD	0x0B

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#define Create_Dirty_Excl_SD	0x0f

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#define Hit_Invalidate_SI	0x12

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#define Hit_Invalidate_SD	0x13

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#define Hit_Writeback_Inv_SD	0x17

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#define Hit_Writeback_SD	0x1b

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#define Hit_Set_Virtual_SI	0x1e

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#define Hit_Set_Virtual_SD	0x1f

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/*

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 * R5000-specific cacheops

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 */

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#define R5K_Page_Invalidate_S	0x17

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/*

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 * RM7000-specific cacheops

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 */

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#define Page_Invalidate_T	0x16

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#define Index_Store_Tag_T	0x0a

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#define Index_Load_Tag_T	0x06

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/*

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 * R10000-specific cacheops

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 *

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 * Cacheops 0x02, 0x06, 0x0a, 0x0c-0x0e, 0x16, 0x1a and 0x1e are unused.

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 * Most of the _S cacheops are identical to the R4000SC _SD cacheops.

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 */

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#define Index_Writeback_Inv_S	0x03

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#define Index_Load_Tag_S	0x07

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#define Index_Store_Tag_S	0x0B

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#define Hit_Invalidate_S	0x13

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#define Cache_Barrier		0x14

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#define Hit_Writeback_Inv_S	0x17

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#define Index_Load_Data_I	0x18

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#define Index_Load_Data_D	0x19

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#define Index_Load_Data_S	0x1b

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#define Index_Store_Data_I	0x1c

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#define Index_Store_Data_D	0x1d

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#define Index_Store_Data_S	0x1f

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#endif	/* __ASM_CACHEOPS_H */

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