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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/mips/mipssim/sim_time.c
10818 views
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#include <linux/types.h>

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#include <linux/init.h>

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#include <linux/kernel_stat.h>

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#include <linux/sched.h>

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#include <linux/spinlock.h>

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#include <linux/interrupt.h>

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#include <linux/mc146818rtc.h>

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#include <linux/smp.h>

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#include <linux/timex.h>

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#include <asm/hardirq.h>

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#include <asm/div64.h>

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#include <asm/cpu.h>

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#include <asm/time.h>

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#include <asm/irq.h>

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#include <asm/mc146818-time.h>

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#include <asm/msc01_ic.h>

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#include <asm/mips-boards/generic.h>

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#include <asm/mips-boards/prom.h>

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#include <asm/mips-boards/simint.h>

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unsigned long cpu_khz;

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/*

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 * Estimate CPU frequency.  Sets mips_hpt_frequency as a side-effect

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 */

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static unsigned int __init estimate_cpu_frequency(void)

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{

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	unsigned int prid = read_c0_prid() & 0xffff00;

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	unsigned int count;

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#if 1

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	/*

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	 * hardwire the board frequency to 12MHz.

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	 */

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	if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) ||

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	    (prid == (PRID_COMP_MIPS | PRID_IMP_25KF)))

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		count = 12000000;

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	else

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		count =  6000000;

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#else

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	unsigned int flags;

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	local_irq_save(flags);

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	/* Start counter exactly on falling edge of update flag */

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	while (CMOS_READ(RTC_REG_A) & RTC_UIP);

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	while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));

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	/* Start r4k counter. */

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	write_c0_count(0);

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	/* Read counter exactly on falling edge of update flag */

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	while (CMOS_READ(RTC_REG_A) & RTC_UIP);

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	while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));

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	count = read_c0_count();

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	/* restore interrupts */

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	local_irq_restore(flags);

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#endif

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	mips_hpt_frequency = count;

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	if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&

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	    (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))

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		count *= 2;

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	count += 5000;    /* round */

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	count -= count%10000;

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	return count;

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}

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static int mips_cpu_timer_irq;

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static void mips_timer_dispatch(void)

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{

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	do_IRQ(mips_cpu_timer_irq);

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}

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unsigned __cpuinit get_c0_compare_int(void)

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{

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#ifdef MSC01E_INT_BASE

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	if (cpu_has_veic) {

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		set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);

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		mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;

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		return mips_cpu_timer_irq;

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	}

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#endif

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	if (cpu_has_vint)

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		set_vi_handler(cp0_compare_irq, mips_timer_dispatch);

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	mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;

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	return mips_cpu_timer_irq;

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}

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void __init plat_time_init(void)

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{

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	unsigned int est_freq;

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	/* Set Data mode - binary. */

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	CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);

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	est_freq = estimate_cpu_frequency();

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	printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000,

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	       (est_freq % 1000000) * 100 / 1000000);

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	cpu_khz = est_freq / 1000;

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}

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