/*1* This file is subject to the terms and conditions of the GNU General Public2* License. See the file "COPYING" in the main directory of this archive3* for more details.4*5* Copyright (C) 2006 Cavium Networks6* Cache error handler7*/89#include <asm/asm.h>10#include <asm/regdef.h>11#include <asm/mipsregs.h>12#include <asm/stackframe.h>1314/*15* Handle cache error. Indicate to the second level handler whether16* the exception is recoverable.17*/18LEAF(except_vec2_octeon)1920.set push21.set mips64r222.set noreorder23.set noat242526/* due to an errata we need to read the COP0 CacheErr (Dcache)27* before any cache/DRAM access */2829rdhwr k0, $0 /* get core_id */30PTR_LA k1, cache_err_dcache31sll k0, k0, 332PTR_ADDU k1, k0, k1 /* k1 = &cache_err_dcache[core_id] */3334dmfc0 k0, CP0_CACHEERR, 135sd k0, (k1)36dmtc0 $0, CP0_CACHEERR, 13738/* check whether this is a nested exception */39mfc0 k1, CP0_STATUS40andi k1, k1, ST0_EXL41beqz k1, 1f42nop43j cache_parity_error_octeon_non_recoverable44nop4546/* exception is recoverable */471: j handle_cache_err48nop4950.set pop51END(except_vec2_octeon)5253/* We need to jump to handle_cache_err so that the previous handler54* can fit within 0x80 bytes. We also move from 0xFFFFFFFFAXXXXXXX55* space (uncached) to the 0xFFFFFFFF8XXXXXXX space (cached). */56LEAF(handle_cache_err)57.set push58.set noreorder59.set noat6061SAVE_ALL62KMODE63jal cache_parity_error_octeon_recoverable64nop65j ret_from_exception66nop6768.set pop69END(handle_cache_err)707172