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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/mips/pci/ops-titan.c
10820 views
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/*

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 * Copyright 2003 PMC-Sierra

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 * Author: Manish Lachwani ([email protected])

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 *

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 *  This program is free software; you can redistribute	 it and/or modify it

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 *  under  the terms of	 the GNU General  Public License as published by the

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 *  Free Software Foundation;  either version 2 of the	License, or (at your

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 *  option) any later version.

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 *

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 *  THIS  SOFTWARE  IS PROVIDED	  ``AS	IS'' AND   ANY	EXPRESS OR IMPLIED

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 *  WARRANTIES,	  INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF

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 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN

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 *  NO	EVENT  SHALL   THE AUTHOR  BE	 LIABLE FOR ANY	  DIRECT, INDIRECT,

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 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT

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 *  NOT LIMITED	  TO, PROCUREMENT OF  SUBSTITUTE GOODS	OR SERVICES; LOSS OF

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 *  USE, DATA,	OR PROFITS; OR	BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON

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 *  ANY THEORY OF LIABILITY, WHETHER IN	 CONTRACT, STRICT LIABILITY, OR TORT

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 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

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 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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 *

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 *  You should have received a copy of the  GNU General Public License along

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 *  with this program; if not, write  to the Free Software Foundation, Inc.,

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 *  675 Mass Ave, Cambridge, MA 02139, USA.

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 */

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#include <linux/types.h>

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#include <linux/pci.h>

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#include <linux/kernel.h>

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#include <asm/pci.h>

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#include <asm/io.h>

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#include <asm/rm9k-ocd.h>

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/*

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 * PCI specific defines

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 */

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#define	TITAN_PCI_0_CONFIG_ADDRESS	0x780

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#define	TITAN_PCI_0_CONFIG_DATA		0x784

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/*

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 * Titan PCI Config Read Byte

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 */

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static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg,

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	int size, u32 * val)

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{

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	uint32_t address, tmp;

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	int dev, busno, func;

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	busno = bus->number;

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	dev = PCI_SLOT(devfn);

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	func = PCI_FUNC(devfn);

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	address = (busno << 16) | (dev << 11) | (func << 8) |

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	          (reg & 0xfc) | 0x80000000;

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	/* start the configuration cycle */

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	ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS);

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	tmp = ocd_readl(TITAN_PCI_0_CONFIG_DATA) >> ((reg & 3) << 3);

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	switch (size) {

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	case 1:

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		tmp &= 0xff;

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	case 2:

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		tmp &= 0xffff;

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	}

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	*val = tmp;

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	return PCIBIOS_SUCCESSFUL;

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}

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static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg,

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	int size, u32 val)

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{

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	uint32_t address;

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	int dev, busno, func;

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	busno = bus->number;

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	dev = PCI_SLOT(devfn);

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	func = PCI_FUNC(devfn);

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	address = (busno << 16) | (dev << 11) | (func << 8) |

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		(reg & 0xfc) | 0x80000000;

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	/* start the configuration cycle */

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	ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS);

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	/* write the data */

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	switch (size) {

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	case 1:

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		ocd_writeb(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x3));

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		break;

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	case 2:

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		ocd_writew(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x2));

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		break;

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	case 4:

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		ocd_writel(val, TITAN_PCI_0_CONFIG_DATA);

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		break;

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	}

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	return PCIBIOS_SUCCESSFUL;

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}

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/*

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 * Titan PCI structure

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 */

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struct pci_ops titan_pci_ops = {

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	titan_read_config,

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	titan_write_config,

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};

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