Path: blob/master/arch/mips/pmc-sierra/msp71xx/gpio_extended.c
15118 views
/*1* Generic PMC MSP71xx EXTENDED (EXD) GPIO handling. The extended gpio is2* a set of hardware registers that have no need for explicit locking as3* it is handled by unique method of writing individual set/clr bits.4*5* This program is free software; you can redistribute it and/or modify6* it under the terms of the GNU General Public License version 2 as7* published by the Free Software Foundation.8*9* @author Patrick Glass <[email protected]>10*/1112#include <linux/kernel.h>13#include <linux/module.h>14#include <linux/init.h>15#include <linux/gpio.h>16#include <linux/io.h>1718#define MSP71XX_DATA_OFFSET(gpio) (2 * (gpio))19#define MSP71XX_READ_OFFSET(gpio) (MSP71XX_DATA_OFFSET(gpio) + 1)20#define MSP71XX_CFG_OUT_OFFSET(gpio) (MSP71XX_DATA_OFFSET(gpio) + 16)21#define MSP71XX_CFG_IN_OFFSET(gpio) (MSP71XX_CFG_OUT_OFFSET(gpio) + 1)2223#define MSP71XX_EXD_GPIO_BASE 0x0BC000000L2425#define to_msp71xx_exd_gpio_chip(c) \26container_of(c, struct msp71xx_exd_gpio_chip, chip)2728/*29* struct msp71xx_exd_gpio_chip - container for gpio chip and registers30* @chip: chip structure for the specified gpio bank31* @reg: register for control and data of gpio pin32*/33struct msp71xx_exd_gpio_chip {34struct gpio_chip chip;35void __iomem *reg;36};3738/*39* msp71xx_exd_gpio_get() - return the chip's gpio value40* @chip: chip structure which controls the specified gpio41* @offset: gpio whose value will be returned42*43* It will return 0 if gpio value is low and other if high.44*/45static int msp71xx_exd_gpio_get(struct gpio_chip *chip, unsigned offset)46{47struct msp71xx_exd_gpio_chip *msp71xx_chip =48to_msp71xx_exd_gpio_chip(chip);49const unsigned bit = MSP71XX_READ_OFFSET(offset);5051return __raw_readl(msp71xx_chip->reg) & (1 << bit);52}5354/*55* msp71xx_exd_gpio_set() - set the output value for the gpio56* @chip: chip structure who controls the specified gpio57* @offset: gpio whose value will be assigned58* @value: logic level to assign to the gpio initially59*60* This will set the gpio bit specified to the desired value. It will set the61* gpio pin low if value is 0 otherwise it will be high.62*/63static void msp71xx_exd_gpio_set(struct gpio_chip *chip,64unsigned offset, int value)65{66struct msp71xx_exd_gpio_chip *msp71xx_chip =67to_msp71xx_exd_gpio_chip(chip);68const unsigned bit = MSP71XX_DATA_OFFSET(offset);6970__raw_writel(1 << (bit + (value ? 1 : 0)), msp71xx_chip->reg);71}7273/*74* msp71xx_exd_direction_output() - declare the direction mode for a gpio75* @chip: chip structure which controls the specified gpio76* @offset: gpio whose value will be assigned77* @value: logic level to assign to the gpio initially78*79* This call will set the mode for the @gpio to output. It will set the80* gpio pin low if value is 0 otherwise it will be high.81*/82static int msp71xx_exd_direction_output(struct gpio_chip *chip,83unsigned offset, int value)84{85struct msp71xx_exd_gpio_chip *msp71xx_chip =86to_msp71xx_exd_gpio_chip(chip);8788msp71xx_exd_gpio_set(chip, offset, value);89__raw_writel(1 << MSP71XX_CFG_OUT_OFFSET(offset), msp71xx_chip->reg);90return 0;91}9293/*94* msp71xx_exd_direction_input() - declare the direction mode for a gpio95* @chip: chip structure which controls the specified gpio96* @offset: gpio whose to which the value will be assigned97*98* This call will set the mode for the @gpio to input.99*/100static int msp71xx_exd_direction_input(struct gpio_chip *chip, unsigned offset)101{102struct msp71xx_exd_gpio_chip *msp71xx_chip =103to_msp71xx_exd_gpio_chip(chip);104105__raw_writel(1 << MSP71XX_CFG_IN_OFFSET(offset), msp71xx_chip->reg);106return 0;107}108109#define MSP71XX_EXD_GPIO_BANK(name, exd_reg, base_gpio, num_gpio) \110{ \111.chip = { \112.label = name, \113.direction_input = msp71xx_exd_direction_input, \114.direction_output = msp71xx_exd_direction_output, \115.get = msp71xx_exd_gpio_get, \116.set = msp71xx_exd_gpio_set, \117.base = base_gpio, \118.ngpio = num_gpio, \119}, \120.reg = (void __iomem *)(MSP71XX_EXD_GPIO_BASE + exd_reg), \121}122123/*124* struct msp71xx_exd_gpio_banks[] - container array of gpio banks125* @chip: chip structure for the specified gpio bank126* @reg: register for reading and writing the gpio pin value127*128* This array structure defines the extended gpio banks for the129* PMC MIPS Processor. We specify the bank name, the data/config130* register,the base starting gpio number, and the number of131* gpios exposed by the bank of gpios.132*/133static struct msp71xx_exd_gpio_chip msp71xx_exd_gpio_banks[] = {134135MSP71XX_EXD_GPIO_BANK("GPIO_23_16", 0x188, 16, 8),136MSP71XX_EXD_GPIO_BANK("GPIO_27_24", 0x18C, 24, 4),137};138139void __init msp71xx_init_gpio_extended(void)140{141int i;142143for (i = 0; i < ARRAY_SIZE(msp71xx_exd_gpio_banks); i++)144gpiochip_add(&msp71xx_exd_gpio_banks[i].chip);145}146147148