Path: blob/master/arch/mips/pnx8550/common/setup.c
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/*1*2* 2.6 port, Embedded Alley Solutions, Inc3*4* Based on Per Hallsmark, [email protected]5*6* This program is free software; you can distribute it and/or modify it7* under the terms of the GNU General Public License (Version 2) as8* published by the Free Software Foundation.9*10* This program is distributed in the hope it will be useful, but WITHOUT11* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or12* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License13* for more details.14*15* You should have received a copy of the GNU General Public License along16* with this program; if not, write to the Free Software Foundation, Inc.,17* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.18*/19#include <linux/init.h>20#include <linux/sched.h>21#include <linux/ioport.h>22#include <linux/irq.h>23#include <linux/mm.h>24#include <linux/delay.h>25#include <linux/interrupt.h>26#include <linux/serial_pnx8xxx.h>27#include <linux/pm.h>2829#include <asm/cpu.h>30#include <asm/bootinfo.h>31#include <asm/irq.h>32#include <asm/mipsregs.h>33#include <asm/reboot.h>34#include <asm/pgtable.h>35#include <asm/time.h>3637#include <glb.h>38#include <int.h>39#include <pci.h>40#include <uart.h>41#include <nand.h>4243extern void __init board_setup(void);44extern void pnx8550_machine_restart(char *);45extern void pnx8550_machine_halt(void);46extern struct resource ioport_resource;47extern struct resource iomem_resource;48extern char *prom_getcmdline(void);4950struct resource standard_io_resources[] = {51{52.start = 0x00,53.end = 0x1f,54.name = "dma1",55.flags = IORESOURCE_BUSY56}, {57.start = 0x40,58.end = 0x5f,59.name = "timer",60.flags = IORESOURCE_BUSY61}, {62.start = 0x80,63.end = 0x8f,64.name = "dma page reg",65.flags = IORESOURCE_BUSY66}, {67.start = 0xc0,68.end = 0xdf,69.name = "dma2",70.flags = IORESOURCE_BUSY71},72};7374#define STANDARD_IO_RESOURCES ARRAY_SIZE(standard_io_resources)7576extern struct resource pci_io_resource;77extern struct resource pci_mem_resource;7879/* Return the total size of DRAM-memory, (RANK0 + RANK1) */80unsigned long get_system_mem_size(void)81{82/* Read IP2031_RANK0_ADDR_LO */83unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);84/* Read IP2031_RANK1_ADDR_HI */85unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);8687return dram_r1_hi - dram_r0_lo + 1;88}8990int pnx8550_console_port = -1;9192void __init plat_mem_setup(void)93{94int i;95char* argptr;9697board_setup(); /* board specific setup */9899_machine_restart = pnx8550_machine_restart;100_machine_halt = pnx8550_machine_halt;101pm_power_off = pnx8550_machine_halt;102103/* Clear the Global 2 Register, PCI Inta Output Enable Registers104Bit 1:Enable DAC Powerdown105-> 0:DACs are enabled and are working normally1061:DACs are powerdown107Bit 0:Enable of PCI inta output108-> 0 = Disable PCI inta output1091 = Enable PCI inta output110*/111PNX8550_GLB2_ENAB_INTA_O = 0;112113/* IO/MEM resources. */114set_io_port_base(PNX8550_PORT_BASE);115ioport_resource.start = 0;116ioport_resource.end = ~0;117iomem_resource.start = 0;118iomem_resource.end = ~0;119120/* Request I/O space for devices on this board */121for (i = 0; i < STANDARD_IO_RESOURCES; i++)122request_resource(&ioport_resource, standard_io_resources + i);123124/* Place the Mode Control bit for GPIO pin 16 in primary function */125/* Pin 16 is used by UART1, UA1_TX */126outl((PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_16_BIT) |127(PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_17_BIT),128PNX8550_GPIO_MC1);129130argptr = prom_getcmdline();131if ((argptr = strstr(argptr, "console=ttyS")) != NULL) {132argptr += strlen("console=ttyS");133pnx8550_console_port = *argptr == '0' ? 0 : 1;134135/* We must initialize the UART (console) before early printk */136/* Set LCR to 8-bit and BAUD to 38400 (no 5) */137ip3106_lcr(UART_BASE, pnx8550_console_port) =138PNX8XXX_UART_LCR_8BIT;139ip3106_baud(UART_BASE, pnx8550_console_port) = 5;140}141142return;143}144145146