Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/mips/txx9/generic/setup.c
10818 views
1
/*
2
* Based on linux/arch/mips/txx9/rbtx4938/setup.c,
3
* and RBTX49xx patch from CELF patch archive.
4
*
5
* 2003-2005 (c) MontaVista Software, Inc.
6
* (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
7
*
8
* This file is subject to the terms and conditions of the GNU General Public
9
* License. See the file "COPYING" in the main directory of this archive
10
* for more details.
11
*/
12
#include <linux/init.h>
13
#include <linux/kernel.h>
14
#include <linux/types.h>
15
#include <linux/interrupt.h>
16
#include <linux/string.h>
17
#include <linux/module.h>
18
#include <linux/clk.h>
19
#include <linux/err.h>
20
#include <linux/gpio.h>
21
#include <linux/platform_device.h>
22
#include <linux/serial_core.h>
23
#include <linux/mtd/physmap.h>
24
#include <linux/leds.h>
25
#include <linux/sysdev.h>
26
#include <linux/slab.h>
27
#include <linux/irq.h>
28
#include <asm/bootinfo.h>
29
#include <asm/time.h>
30
#include <asm/reboot.h>
31
#include <asm/r4kcache.h>
32
#include <asm/sections.h>
33
#include <asm/txx9/generic.h>
34
#include <asm/txx9/pci.h>
35
#include <asm/txx9tmr.h>
36
#include <asm/txx9/ndfmc.h>
37
#include <asm/txx9/dmac.h>
38
#ifdef CONFIG_CPU_TX49XX
39
#include <asm/txx9/tx4938.h>
40
#endif
41
42
/* EBUSC settings of TX4927, etc. */
43
struct resource txx9_ce_res[8];
44
static char txx9_ce_res_name[8][4]; /* "CEn" */
45
46
/* pcode, internal register */
47
unsigned int txx9_pcode;
48
char txx9_pcode_str[8];
49
static struct resource txx9_reg_res = {
50
.name = txx9_pcode_str,
51
.flags = IORESOURCE_MEM,
52
};
53
void __init
54
txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
55
{
56
int i;
57
58
for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
59
sprintf(txx9_ce_res_name[i], "CE%d", i);
60
txx9_ce_res[i].flags = IORESOURCE_MEM;
61
txx9_ce_res[i].name = txx9_ce_res_name[i];
62
}
63
64
txx9_pcode = pcode;
65
sprintf(txx9_pcode_str, "TX%x", pcode);
66
if (base) {
67
txx9_reg_res.start = base & 0xfffffffffULL;
68
txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
69
request_resource(&iomem_resource, &txx9_reg_res);
70
}
71
}
72
73
/* clocks */
74
unsigned int txx9_master_clock;
75
unsigned int txx9_cpu_clock;
76
unsigned int txx9_gbus_clock;
77
78
#ifdef CONFIG_CPU_TX39XX
79
/* don't enable by default - see errata */
80
int txx9_ccfg_toeon __initdata;
81
#else
82
int txx9_ccfg_toeon __initdata = 1;
83
#endif
84
85
/* Minimum CLK support */
86
87
struct clk *clk_get(struct device *dev, const char *id)
88
{
89
if (!strcmp(id, "spi-baseclk"))
90
return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 2);
91
if (!strcmp(id, "imbus_clk"))
92
return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
93
return ERR_PTR(-ENOENT);
94
}
95
EXPORT_SYMBOL(clk_get);
96
97
int clk_enable(struct clk *clk)
98
{
99
return 0;
100
}
101
EXPORT_SYMBOL(clk_enable);
102
103
void clk_disable(struct clk *clk)
104
{
105
}
106
EXPORT_SYMBOL(clk_disable);
107
108
unsigned long clk_get_rate(struct clk *clk)
109
{
110
return (unsigned long)clk;
111
}
112
EXPORT_SYMBOL(clk_get_rate);
113
114
void clk_put(struct clk *clk)
115
{
116
}
117
EXPORT_SYMBOL(clk_put);
118
119
/* GPIO support */
120
121
#ifdef CONFIG_GENERIC_GPIO
122
int gpio_to_irq(unsigned gpio)
123
{
124
return -EINVAL;
125
}
126
EXPORT_SYMBOL(gpio_to_irq);
127
128
int irq_to_gpio(unsigned irq)
129
{
130
return -EINVAL;
131
}
132
EXPORT_SYMBOL(irq_to_gpio);
133
#endif
134
135
#define BOARD_VEC(board) extern struct txx9_board_vec board;
136
#include <asm/txx9/boards.h>
137
#undef BOARD_VEC
138
139
struct txx9_board_vec *txx9_board_vec __initdata;
140
static char txx9_system_type[32];
141
142
static struct txx9_board_vec *board_vecs[] __initdata = {
143
#define BOARD_VEC(board) &board,
144
#include <asm/txx9/boards.h>
145
#undef BOARD_VEC
146
};
147
148
static struct txx9_board_vec *__init find_board_byname(const char *name)
149
{
150
int i;
151
152
/* search board_vecs table */
153
for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
154
if (strstr(board_vecs[i]->system, name))
155
return board_vecs[i];
156
}
157
return NULL;
158
}
159
160
static void __init prom_init_cmdline(void)
161
{
162
int argc;
163
int *argv32;
164
int i; /* Always ignore the "-c" at argv[0] */
165
166
if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
167
/*
168
* argc is not a valid number, or argv32 is not a valid
169
* pointer
170
*/
171
argc = 0;
172
argv32 = NULL;
173
} else {
174
argc = (int)fw_arg0;
175
argv32 = (int *)fw_arg1;
176
}
177
178
arcs_cmdline[0] = '\0';
179
180
for (i = 1; i < argc; i++) {
181
char *str = (char *)(long)argv32[i];
182
if (i != 1)
183
strcat(arcs_cmdline, " ");
184
if (strchr(str, ' ')) {
185
strcat(arcs_cmdline, "\"");
186
strcat(arcs_cmdline, str);
187
strcat(arcs_cmdline, "\"");
188
} else
189
strcat(arcs_cmdline, str);
190
}
191
}
192
193
static int txx9_ic_disable __initdata;
194
static int txx9_dc_disable __initdata;
195
196
#if defined(CONFIG_CPU_TX49XX)
197
/* flush all cache on very early stage (before 4k_cache_init) */
198
static void __init early_flush_dcache(void)
199
{
200
unsigned int conf = read_c0_config();
201
unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
202
unsigned int linesz = 32;
203
unsigned long addr, end;
204
205
end = INDEX_BASE + dc_size / 4;
206
/* 4way, waybit=0 */
207
for (addr = INDEX_BASE; addr < end; addr += linesz) {
208
cache_op(Index_Writeback_Inv_D, addr | 0);
209
cache_op(Index_Writeback_Inv_D, addr | 1);
210
cache_op(Index_Writeback_Inv_D, addr | 2);
211
cache_op(Index_Writeback_Inv_D, addr | 3);
212
}
213
}
214
215
static void __init txx9_cache_fixup(void)
216
{
217
unsigned int conf;
218
219
conf = read_c0_config();
220
/* flush and disable */
221
if (txx9_ic_disable) {
222
conf |= TX49_CONF_IC;
223
write_c0_config(conf);
224
}
225
if (txx9_dc_disable) {
226
early_flush_dcache();
227
conf |= TX49_CONF_DC;
228
write_c0_config(conf);
229
}
230
231
/* enable cache */
232
conf = read_c0_config();
233
if (!txx9_ic_disable)
234
conf &= ~TX49_CONF_IC;
235
if (!txx9_dc_disable)
236
conf &= ~TX49_CONF_DC;
237
write_c0_config(conf);
238
239
if (conf & TX49_CONF_IC)
240
pr_info("TX49XX I-Cache disabled.\n");
241
if (conf & TX49_CONF_DC)
242
pr_info("TX49XX D-Cache disabled.\n");
243
}
244
#elif defined(CONFIG_CPU_TX39XX)
245
/* flush all cache on very early stage (before tx39_cache_init) */
246
static void __init early_flush_dcache(void)
247
{
248
unsigned int conf = read_c0_config();
249
unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
250
TX39_CONF_DCS_SHIFT));
251
unsigned int linesz = 16;
252
unsigned long addr, end;
253
254
end = INDEX_BASE + dc_size / 2;
255
/* 2way, waybit=0 */
256
for (addr = INDEX_BASE; addr < end; addr += linesz) {
257
cache_op(Index_Writeback_Inv_D, addr | 0);
258
cache_op(Index_Writeback_Inv_D, addr | 1);
259
}
260
}
261
262
static void __init txx9_cache_fixup(void)
263
{
264
unsigned int conf;
265
266
conf = read_c0_config();
267
/* flush and disable */
268
if (txx9_ic_disable) {
269
conf &= ~TX39_CONF_ICE;
270
write_c0_config(conf);
271
}
272
if (txx9_dc_disable) {
273
early_flush_dcache();
274
conf &= ~TX39_CONF_DCE;
275
write_c0_config(conf);
276
}
277
278
/* enable cache */
279
conf = read_c0_config();
280
if (!txx9_ic_disable)
281
conf |= TX39_CONF_ICE;
282
if (!txx9_dc_disable)
283
conf |= TX39_CONF_DCE;
284
write_c0_config(conf);
285
286
if (!(conf & TX39_CONF_ICE))
287
pr_info("TX39XX I-Cache disabled.\n");
288
if (!(conf & TX39_CONF_DCE))
289
pr_info("TX39XX D-Cache disabled.\n");
290
}
291
#else
292
static inline void txx9_cache_fixup(void)
293
{
294
}
295
#endif
296
297
static void __init preprocess_cmdline(void)
298
{
299
static char cmdline[COMMAND_LINE_SIZE] __initdata;
300
char *s;
301
302
strcpy(cmdline, arcs_cmdline);
303
s = cmdline;
304
arcs_cmdline[0] = '\0';
305
while (s && *s) {
306
char *str = strsep(&s, " ");
307
if (strncmp(str, "board=", 6) == 0) {
308
txx9_board_vec = find_board_byname(str + 6);
309
continue;
310
} else if (strncmp(str, "masterclk=", 10) == 0) {
311
unsigned long val;
312
if (strict_strtoul(str + 10, 10, &val) == 0)
313
txx9_master_clock = val;
314
continue;
315
} else if (strcmp(str, "icdisable") == 0) {
316
txx9_ic_disable = 1;
317
continue;
318
} else if (strcmp(str, "dcdisable") == 0) {
319
txx9_dc_disable = 1;
320
continue;
321
} else if (strcmp(str, "toeoff") == 0) {
322
txx9_ccfg_toeon = 0;
323
continue;
324
} else if (strcmp(str, "toeon") == 0) {
325
txx9_ccfg_toeon = 1;
326
continue;
327
}
328
if (arcs_cmdline[0])
329
strcat(arcs_cmdline, " ");
330
strcat(arcs_cmdline, str);
331
}
332
333
txx9_cache_fixup();
334
}
335
336
static void __init select_board(void)
337
{
338
const char *envstr;
339
340
/* first, determine by "board=" argument in preprocess_cmdline() */
341
if (txx9_board_vec)
342
return;
343
/* next, determine by "board" envvar */
344
envstr = prom_getenv("board");
345
if (envstr) {
346
txx9_board_vec = find_board_byname(envstr);
347
if (txx9_board_vec)
348
return;
349
}
350
351
/* select "default" board */
352
#ifdef CONFIG_CPU_TX39XX
353
txx9_board_vec = &jmr3927_vec;
354
#endif
355
#ifdef CONFIG_CPU_TX49XX
356
switch (TX4938_REV_PCODE()) {
357
#ifdef CONFIG_TOSHIBA_RBTX4927
358
case 0x4927:
359
txx9_board_vec = &rbtx4927_vec;
360
break;
361
case 0x4937:
362
txx9_board_vec = &rbtx4937_vec;
363
break;
364
#endif
365
#ifdef CONFIG_TOSHIBA_RBTX4938
366
case 0x4938:
367
txx9_board_vec = &rbtx4938_vec;
368
break;
369
#endif
370
#ifdef CONFIG_TOSHIBA_RBTX4939
371
case 0x4939:
372
txx9_board_vec = &rbtx4939_vec;
373
break;
374
#endif
375
}
376
#endif
377
}
378
379
void __init prom_init(void)
380
{
381
prom_init_cmdline();
382
preprocess_cmdline();
383
select_board();
384
385
strcpy(txx9_system_type, txx9_board_vec->system);
386
387
txx9_board_vec->prom_init();
388
}
389
390
void __init prom_free_prom_memory(void)
391
{
392
unsigned long saddr = PAGE_SIZE;
393
unsigned long eaddr = __pa_symbol(&_text);
394
395
if (saddr < eaddr)
396
free_init_pages("prom memory", saddr, eaddr);
397
}
398
399
const char *get_system_type(void)
400
{
401
return txx9_system_type;
402
}
403
404
const char *__init prom_getenv(const char *name)
405
{
406
const s32 *str;
407
408
if (fw_arg2 < CKSEG0)
409
return NULL;
410
411
str = (const s32 *)fw_arg2;
412
/* YAMON style ("name", "value" pairs) */
413
while (str[0] && str[1]) {
414
if (!strcmp((const char *)(unsigned long)str[0], name))
415
return (const char *)(unsigned long)str[1];
416
str += 2;
417
}
418
return NULL;
419
}
420
421
static void __noreturn txx9_machine_halt(void)
422
{
423
local_irq_disable();
424
clear_c0_status(ST0_IM);
425
while (1) {
426
if (cpu_wait) {
427
(*cpu_wait)();
428
if (cpu_has_counter) {
429
/*
430
* Clear counter interrupt while it
431
* breaks WAIT instruction even if
432
* masked.
433
*/
434
write_c0_compare(0);
435
}
436
}
437
}
438
}
439
440
/* Watchdog support */
441
void __init txx9_wdt_init(unsigned long base)
442
{
443
struct resource res = {
444
.start = base,
445
.end = base + 0x100 - 1,
446
.flags = IORESOURCE_MEM,
447
};
448
platform_device_register_simple("txx9wdt", -1, &res, 1);
449
}
450
451
void txx9_wdt_now(unsigned long base)
452
{
453
struct txx9_tmr_reg __iomem *tmrptr =
454
ioremap(base, sizeof(struct txx9_tmr_reg));
455
/* disable watch dog timer */
456
__raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
457
__raw_writel(0, &tmrptr->tcr);
458
/* kick watchdog */
459
__raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
460
__raw_writel(1, &tmrptr->cpra); /* immediate */
461
__raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
462
&tmrptr->tcr);
463
}
464
465
/* SPI support */
466
void __init txx9_spi_init(int busid, unsigned long base, int irq)
467
{
468
struct resource res[] = {
469
{
470
.start = base,
471
.end = base + 0x20 - 1,
472
.flags = IORESOURCE_MEM,
473
}, {
474
.start = irq,
475
.flags = IORESOURCE_IRQ,
476
},
477
};
478
platform_device_register_simple("spi_txx9", busid,
479
res, ARRAY_SIZE(res));
480
}
481
482
void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
483
{
484
struct platform_device *pdev =
485
platform_device_alloc("tc35815-mac", id);
486
if (!pdev ||
487
platform_device_add_data(pdev, ethaddr, 6) ||
488
platform_device_add(pdev))
489
platform_device_put(pdev);
490
}
491
492
void __init txx9_sio_init(unsigned long baseaddr, int irq,
493
unsigned int line, unsigned int sclk, int nocts)
494
{
495
#ifdef CONFIG_SERIAL_TXX9
496
struct uart_port req;
497
498
memset(&req, 0, sizeof(req));
499
req.line = line;
500
req.iotype = UPIO_MEM;
501
req.membase = ioremap(baseaddr, 0x24);
502
req.mapbase = baseaddr;
503
req.irq = irq;
504
if (!nocts)
505
req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
506
if (sclk) {
507
req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
508
req.uartclk = sclk;
509
} else
510
req.uartclk = TXX9_IMCLK;
511
early_serial_txx9_setup(&req);
512
#endif /* CONFIG_SERIAL_TXX9 */
513
}
514
515
#ifdef CONFIG_EARLY_PRINTK
516
static void __init null_prom_putchar(char c)
517
{
518
}
519
void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
520
521
void __init prom_putchar(char c)
522
{
523
txx9_prom_putchar(c);
524
}
525
526
static void __iomem *early_txx9_sio_port;
527
528
static void __init early_txx9_sio_putchar(char c)
529
{
530
#define TXX9_SICISR 0x0c
531
#define TXX9_SITFIFO 0x1c
532
#define TXX9_SICISR_TXALS 0x00000002
533
while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
534
TXX9_SICISR_TXALS))
535
;
536
__raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
537
}
538
539
void __init txx9_sio_putchar_init(unsigned long baseaddr)
540
{
541
early_txx9_sio_port = ioremap(baseaddr, 0x24);
542
txx9_prom_putchar = early_txx9_sio_putchar;
543
}
544
#endif /* CONFIG_EARLY_PRINTK */
545
546
/* wrappers */
547
void __init plat_mem_setup(void)
548
{
549
ioport_resource.start = 0;
550
ioport_resource.end = ~0UL; /* no limit */
551
iomem_resource.start = 0;
552
iomem_resource.end = ~0UL; /* no limit */
553
554
/* fallback restart/halt routines */
555
_machine_restart = (void (*)(char *))txx9_machine_halt;
556
_machine_halt = txx9_machine_halt;
557
pm_power_off = txx9_machine_halt;
558
559
#ifdef CONFIG_PCI
560
pcibios_plat_setup = txx9_pcibios_setup;
561
#endif
562
txx9_board_vec->mem_setup();
563
}
564
565
void __init arch_init_irq(void)
566
{
567
txx9_board_vec->irq_setup();
568
}
569
570
void __init plat_time_init(void)
571
{
572
#ifdef CONFIG_CPU_TX49XX
573
mips_hpt_frequency = txx9_cpu_clock / 2;
574
#endif
575
txx9_board_vec->time_init();
576
}
577
578
static int __init _txx9_arch_init(void)
579
{
580
if (txx9_board_vec->arch_init)
581
txx9_board_vec->arch_init();
582
return 0;
583
}
584
arch_initcall(_txx9_arch_init);
585
586
static int __init _txx9_device_init(void)
587
{
588
if (txx9_board_vec->device_init)
589
txx9_board_vec->device_init();
590
return 0;
591
}
592
device_initcall(_txx9_device_init);
593
594
int (*txx9_irq_dispatch)(int pending);
595
asmlinkage void plat_irq_dispatch(void)
596
{
597
int pending = read_c0_status() & read_c0_cause() & ST0_IM;
598
int irq = txx9_irq_dispatch(pending);
599
600
if (likely(irq >= 0))
601
do_IRQ(irq);
602
else
603
spurious_interrupt();
604
}
605
606
/* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
607
#ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
608
static unsigned long __swizzle_addr_none(unsigned long port)
609
{
610
return port;
611
}
612
unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
613
EXPORT_SYMBOL(__swizzle_addr_b);
614
#endif
615
616
#ifdef NEEDS_TXX9_IOSWABW
617
static u16 ioswabw_default(volatile u16 *a, u16 x)
618
{
619
return le16_to_cpu(x);
620
}
621
static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
622
{
623
return x;
624
}
625
u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
626
EXPORT_SYMBOL(ioswabw);
627
u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
628
EXPORT_SYMBOL(__mem_ioswabw);
629
#endif
630
631
void __init txx9_physmap_flash_init(int no, unsigned long addr,
632
unsigned long size,
633
const struct physmap_flash_data *pdata)
634
{
635
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
636
struct resource res = {
637
.start = addr,
638
.end = addr + size - 1,
639
.flags = IORESOURCE_MEM,
640
};
641
struct platform_device *pdev;
642
static struct mtd_partition parts[2];
643
struct physmap_flash_data pdata_part;
644
645
/* If this area contained boot area, make separate partition */
646
if (pdata->nr_parts == 0 && !pdata->parts &&
647
addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
648
!parts[0].name) {
649
parts[0].name = "boot";
650
parts[0].offset = 0x1fc00000 - addr;
651
parts[0].size = addr + size - 0x1fc00000;
652
parts[1].name = "user";
653
parts[1].offset = 0;
654
parts[1].size = 0x1fc00000 - addr;
655
pdata_part = *pdata;
656
pdata_part.nr_parts = ARRAY_SIZE(parts);
657
pdata_part.parts = parts;
658
pdata = &pdata_part;
659
}
660
661
pdev = platform_device_alloc("physmap-flash", no);
662
if (!pdev ||
663
platform_device_add_resources(pdev, &res, 1) ||
664
platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
665
platform_device_add(pdev))
666
platform_device_put(pdev);
667
#endif
668
}
669
670
void __init txx9_ndfmc_init(unsigned long baseaddr,
671
const struct txx9ndfmc_platform_data *pdata)
672
{
673
#if defined(CONFIG_MTD_NAND_TXX9NDFMC) || \
674
defined(CONFIG_MTD_NAND_TXX9NDFMC_MODULE)
675
struct resource res = {
676
.start = baseaddr,
677
.end = baseaddr + 0x1000 - 1,
678
.flags = IORESOURCE_MEM,
679
};
680
struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
681
682
if (!pdev ||
683
platform_device_add_resources(pdev, &res, 1) ||
684
platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
685
platform_device_add(pdev))
686
platform_device_put(pdev);
687
#endif
688
}
689
690
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
691
static DEFINE_SPINLOCK(txx9_iocled_lock);
692
693
#define TXX9_IOCLED_MAXLEDS 8
694
695
struct txx9_iocled_data {
696
struct gpio_chip chip;
697
u8 cur_val;
698
void __iomem *mmioaddr;
699
struct gpio_led_platform_data pdata;
700
struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
701
char names[TXX9_IOCLED_MAXLEDS][32];
702
};
703
704
static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
705
{
706
struct txx9_iocled_data *data =
707
container_of(chip, struct txx9_iocled_data, chip);
708
return data->cur_val & (1 << offset);
709
}
710
711
static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
712
int value)
713
{
714
struct txx9_iocled_data *data =
715
container_of(chip, struct txx9_iocled_data, chip);
716
unsigned long flags;
717
spin_lock_irqsave(&txx9_iocled_lock, flags);
718
if (value)
719
data->cur_val |= 1 << offset;
720
else
721
data->cur_val &= ~(1 << offset);
722
writeb(data->cur_val, data->mmioaddr);
723
mmiowb();
724
spin_unlock_irqrestore(&txx9_iocled_lock, flags);
725
}
726
727
static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
728
{
729
return 0;
730
}
731
732
static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
733
int value)
734
{
735
txx9_iocled_set(chip, offset, value);
736
return 0;
737
}
738
739
void __init txx9_iocled_init(unsigned long baseaddr,
740
int basenum, unsigned int num, int lowactive,
741
const char *color, char **deftriggers)
742
{
743
struct txx9_iocled_data *iocled;
744
struct platform_device *pdev;
745
int i;
746
static char *default_triggers[] __initdata = {
747
"heartbeat",
748
"ide-disk",
749
"nand-disk",
750
NULL,
751
};
752
753
if (!deftriggers)
754
deftriggers = default_triggers;
755
iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
756
if (!iocled)
757
return;
758
iocled->mmioaddr = ioremap(baseaddr, 1);
759
if (!iocled->mmioaddr)
760
goto out_free;
761
iocled->chip.get = txx9_iocled_get;
762
iocled->chip.set = txx9_iocled_set;
763
iocled->chip.direction_input = txx9_iocled_dir_in;
764
iocled->chip.direction_output = txx9_iocled_dir_out;
765
iocled->chip.label = "iocled";
766
iocled->chip.base = basenum;
767
iocled->chip.ngpio = num;
768
if (gpiochip_add(&iocled->chip))
769
goto out_unmap;
770
if (basenum < 0)
771
basenum = iocled->chip.base;
772
773
pdev = platform_device_alloc("leds-gpio", basenum);
774
if (!pdev)
775
goto out_gpio;
776
iocled->pdata.num_leds = num;
777
iocled->pdata.leds = iocled->leds;
778
for (i = 0; i < num; i++) {
779
struct gpio_led *led = &iocled->leds[i];
780
snprintf(iocled->names[i], sizeof(iocled->names[i]),
781
"iocled:%s:%u", color, i);
782
led->name = iocled->names[i];
783
led->gpio = basenum + i;
784
led->active_low = lowactive;
785
if (deftriggers && *deftriggers)
786
led->default_trigger = *deftriggers++;
787
}
788
pdev->dev.platform_data = &iocled->pdata;
789
if (platform_device_add(pdev))
790
goto out_pdev;
791
return;
792
out_pdev:
793
platform_device_put(pdev);
794
out_gpio:
795
if (gpiochip_remove(&iocled->chip))
796
return;
797
out_unmap:
798
iounmap(iocled->mmioaddr);
799
out_free:
800
kfree(iocled);
801
}
802
#else /* CONFIG_LEDS_GPIO */
803
void __init txx9_iocled_init(unsigned long baseaddr,
804
int basenum, unsigned int num, int lowactive,
805
const char *color, char **deftriggers)
806
{
807
}
808
#endif /* CONFIG_LEDS_GPIO */
809
810
void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
811
const struct txx9dmac_platform_data *pdata)
812
{
813
#if defined(CONFIG_TXX9_DMAC) || defined(CONFIG_TXX9_DMAC_MODULE)
814
struct resource res[] = {
815
{
816
.start = baseaddr,
817
.end = baseaddr + 0x800 - 1,
818
.flags = IORESOURCE_MEM,
819
#ifndef CONFIG_MACH_TX49XX
820
}, {
821
.start = irq,
822
.flags = IORESOURCE_IRQ,
823
#endif
824
}
825
};
826
#ifdef CONFIG_MACH_TX49XX
827
struct resource chan_res[] = {
828
{
829
.flags = IORESOURCE_IRQ,
830
}
831
};
832
#endif
833
struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
834
struct txx9dmac_chan_platform_data cpdata;
835
int i;
836
837
if (!pdev ||
838
platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
839
platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
840
platform_device_add(pdev)) {
841
platform_device_put(pdev);
842
return;
843
}
844
memset(&cpdata, 0, sizeof(cpdata));
845
cpdata.dmac_dev = pdev;
846
for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
847
#ifdef CONFIG_MACH_TX49XX
848
chan_res[0].start = irq + i;
849
#endif
850
pdev = platform_device_alloc("txx9dmac-chan",
851
id * TXX9_DMA_MAX_NR_CHANNELS + i);
852
if (!pdev ||
853
#ifdef CONFIG_MACH_TX49XX
854
platform_device_add_resources(pdev, chan_res,
855
ARRAY_SIZE(chan_res)) ||
856
#endif
857
platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
858
platform_device_add(pdev))
859
platform_device_put(pdev);
860
}
861
#endif
862
}
863
864
void __init txx9_aclc_init(unsigned long baseaddr, int irq,
865
unsigned int dmac_id,
866
unsigned int dma_chan_out,
867
unsigned int dma_chan_in)
868
{
869
#if defined(CONFIG_SND_SOC_TXX9ACLC) || \
870
defined(CONFIG_SND_SOC_TXX9ACLC_MODULE)
871
unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS;
872
struct resource res[] = {
873
{
874
.start = baseaddr,
875
.end = baseaddr + 0x100 - 1,
876
.flags = IORESOURCE_MEM,
877
}, {
878
.start = irq,
879
.flags = IORESOURCE_IRQ,
880
}, {
881
.name = "txx9dmac-chan",
882
.start = dma_base + dma_chan_out,
883
.flags = IORESOURCE_DMA,
884
}, {
885
.name = "txx9dmac-chan",
886
.start = dma_base + dma_chan_in,
887
.flags = IORESOURCE_DMA,
888
}
889
};
890
struct platform_device *pdev =
891
platform_device_alloc("txx9aclc-ac97", -1);
892
893
if (!pdev ||
894
platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
895
platform_device_add(pdev))
896
platform_device_put(pdev);
897
#endif
898
}
899
900
static struct sysdev_class txx9_sramc_sysdev_class;
901
902
struct txx9_sramc_sysdev {
903
struct sys_device dev;
904
struct bin_attribute bindata_attr;
905
void __iomem *base;
906
};
907
908
static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj,
909
struct bin_attribute *bin_attr,
910
char *buf, loff_t pos, size_t size)
911
{
912
struct txx9_sramc_sysdev *dev = bin_attr->private;
913
size_t ramsize = bin_attr->size;
914
915
if (pos >= ramsize)
916
return 0;
917
if (pos + size > ramsize)
918
size = ramsize - pos;
919
memcpy_fromio(buf, dev->base + pos, size);
920
return size;
921
}
922
923
static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj,
924
struct bin_attribute *bin_attr,
925
char *buf, loff_t pos, size_t size)
926
{
927
struct txx9_sramc_sysdev *dev = bin_attr->private;
928
size_t ramsize = bin_attr->size;
929
930
if (pos >= ramsize)
931
return 0;
932
if (pos + size > ramsize)
933
size = ramsize - pos;
934
memcpy_toio(dev->base + pos, buf, size);
935
return size;
936
}
937
938
void __init txx9_sramc_init(struct resource *r)
939
{
940
struct txx9_sramc_sysdev *dev;
941
size_t size;
942
int err;
943
944
if (!txx9_sramc_sysdev_class.name) {
945
txx9_sramc_sysdev_class.name = "txx9_sram";
946
err = sysdev_class_register(&txx9_sramc_sysdev_class);
947
if (err) {
948
txx9_sramc_sysdev_class.name = NULL;
949
return;
950
}
951
}
952
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
953
if (!dev)
954
return;
955
size = resource_size(r);
956
dev->base = ioremap(r->start, size);
957
if (!dev->base)
958
goto exit;
959
dev->dev.cls = &txx9_sramc_sysdev_class;
960
sysfs_bin_attr_init(&dev->bindata_attr);
961
dev->bindata_attr.attr.name = "bindata";
962
dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
963
dev->bindata_attr.read = txx9_sram_read;
964
dev->bindata_attr.write = txx9_sram_write;
965
dev->bindata_attr.size = size;
966
dev->bindata_attr.private = dev;
967
err = sysdev_register(&dev->dev);
968
if (err)
969
goto exit;
970
err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
971
if (err) {
972
sysdev_unregister(&dev->dev);
973
goto exit;
974
}
975
return;
976
exit:
977
if (dev) {
978
if (dev->base)
979
iounmap(dev->base);
980
kfree(dev);
981
}
982
}
983
984