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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/mips/txx9/generic/smsc_fdc37m81x.c
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/*

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 * Interface for smsc fdc48m81x Super IO chip

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 *

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 * Author: MontaVista Software, Inc. [email protected]

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 *

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 * 2001-2003 (c) MontaVista Software, Inc. This file is licensed under

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 * the terms of the GNU General Public License version 2. This program

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 * is licensed "as is" without any warranty of any kind, whether express

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 * or implied.

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 *

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 * Copyright 2004 (c) MontaVista Software, Inc.

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 */

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#include <linux/init.h>

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#include <linux/types.h>

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#include <asm/io.h>

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#include <asm/txx9/smsc_fdc37m81x.h>

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/* Common Registers */

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#define SMSC_FDC37M81X_CONFIG_INDEX  0x00

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#define SMSC_FDC37M81X_CONFIG_DATA   0x01

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#define SMSC_FDC37M81X_CONF          0x02

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#define SMSC_FDC37M81X_INDEX         0x03

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#define SMSC_FDC37M81X_DNUM          0x07

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#define SMSC_FDC37M81X_DID           0x20

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#define SMSC_FDC37M81X_DREV          0x21

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#define SMSC_FDC37M81X_PCNT          0x22

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#define SMSC_FDC37M81X_PMGT          0x23

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#define SMSC_FDC37M81X_OSC           0x24

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#define SMSC_FDC37M81X_CONFPA0       0x26

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#define SMSC_FDC37M81X_CONFPA1       0x27

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#define SMSC_FDC37M81X_TEST4         0x2B

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#define SMSC_FDC37M81X_TEST5         0x2C

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#define SMSC_FDC37M81X_TEST1         0x2D

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#define SMSC_FDC37M81X_TEST2         0x2E

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#define SMSC_FDC37M81X_TEST3         0x2F

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/* Logical device numbers */

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#define SMSC_FDC37M81X_FDD           0x00

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#define SMSC_FDC37M81X_SERIAL1       0x04

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#define SMSC_FDC37M81X_SERIAL2       0x05

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#define SMSC_FDC37M81X_KBD           0x07

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/* Logical device Config Registers */

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#define SMSC_FDC37M81X_ACTIVE        0x30

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#define SMSC_FDC37M81X_BASEADDR0     0x60

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#define SMSC_FDC37M81X_BASEADDR1     0x61

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#define SMSC_FDC37M81X_INT           0x70

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#define SMSC_FDC37M81X_INT2          0x72

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#define SMSC_FDC37M81X_MODE          0xF0

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/* Chip Config Values */

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#define SMSC_FDC37M81X_CONFIG_ENTER  0x55

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#define SMSC_FDC37M81X_CONFIG_EXIT   0xaa

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#define SMSC_FDC37M81X_CHIP_ID       0x4d

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static unsigned long g_smsc_fdc37m81x_base;

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static inline unsigned char smsc_fdc37m81x_rd(unsigned char index)

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{

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	outb(index, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);

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	return inb(g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_DATA);

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}

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static inline void smsc_dc37m81x_wr(unsigned char index, unsigned char data)

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{

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	outb(index, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);

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	outb(data, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_DATA);

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}

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void smsc_fdc37m81x_config_beg(void)

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{

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	if (g_smsc_fdc37m81x_base) {

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		outb(SMSC_FDC37M81X_CONFIG_ENTER,

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		     g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);

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	}

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}

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void smsc_fdc37m81x_config_end(void)

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{

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	if (g_smsc_fdc37m81x_base)

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		outb(SMSC_FDC37M81X_CONFIG_EXIT,

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		     g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);

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}

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u8 smsc_fdc37m81x_config_get(u8 reg)

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{

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	u8 val = 0;

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	if (g_smsc_fdc37m81x_base)

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		val = smsc_fdc37m81x_rd(reg);

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	return val;

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}

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void smsc_fdc37m81x_config_set(u8 reg, u8 val)

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{

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	if (g_smsc_fdc37m81x_base)

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		smsc_dc37m81x_wr(reg, val);

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}

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unsigned long __init smsc_fdc37m81x_init(unsigned long port)

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{

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	const int field = sizeof(unsigned long) * 2;

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	u8 chip_id;

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	if (g_smsc_fdc37m81x_base)

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		printk(KERN_WARNING "%s: stepping on old base=0x%0*lx\n",

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		       __func__,

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		       field, g_smsc_fdc37m81x_base);

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	g_smsc_fdc37m81x_base = port;

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	smsc_fdc37m81x_config_beg();

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	chip_id = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DID);

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	if (chip_id == SMSC_FDC37M81X_CHIP_ID)

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		smsc_fdc37m81x_config_end();

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	else {

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		printk(KERN_WARNING "%s: unknown chip id 0x%02x\n", __func__,

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		       chip_id);

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		g_smsc_fdc37m81x_base = 0;

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	}

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	return g_smsc_fdc37m81x_base;

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}

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#ifdef DEBUG

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static void smsc_fdc37m81x_config_dump_one(const char *key, u8 dev, u8 reg)

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{

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	printk(KERN_INFO "%s: dev=0x%02x reg=0x%02x val=0x%02x\n",

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	       key, dev, reg,

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	       smsc_fdc37m81x_rd(reg));

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}

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void smsc_fdc37m81x_config_dump(void)

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{

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	u8 orig;

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	const char *fname = __func__;

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	smsc_fdc37m81x_config_beg();

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	orig = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DNUM);

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	printk(KERN_INFO "%s: common\n", fname);

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	smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,

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				       SMSC_FDC37M81X_DNUM);

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	smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,

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				       SMSC_FDC37M81X_DID);

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	smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,

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				       SMSC_FDC37M81X_DREV);

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	smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,

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				       SMSC_FDC37M81X_PCNT);

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	smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,

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				       SMSC_FDC37M81X_PMGT);

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	printk(KERN_INFO "%s: keyboard\n", fname);

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	smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, SMSC_FDC37M81X_KBD);

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	smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,

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				       SMSC_FDC37M81X_ACTIVE);

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	smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,

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				       SMSC_FDC37M81X_INT);

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	smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,

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				       SMSC_FDC37M81X_INT2);

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	smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,

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				       SMSC_FDC37M81X_LDCR_F0);

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	smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, orig);

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	smsc_fdc37m81x_config_end();

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}

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#endif

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