Path: blob/master/arch/mn10300/include/asm/cacheflush.h
15126 views
/* MN10300 Cache flushing1*2* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.3* Written by David Howells ([email protected])4*5* This program is free software; you can redistribute it and/or6* modify it under the terms of the GNU General Public Licence7* as published by the Free Software Foundation; either version8* 2 of the Licence, or (at your option) any later version.9*/10#ifndef _ASM_CACHEFLUSH_H11#define _ASM_CACHEFLUSH_H1213#ifndef __ASSEMBLY__1415/* Keep includes the same across arches. */16#include <linux/mm.h>1718/*19* Primitive routines20*/21#ifdef CONFIG_MN10300_CACHE_ENABLED22extern void mn10300_local_icache_inv(void);23extern void mn10300_local_icache_inv_page(unsigned long start);24extern void mn10300_local_icache_inv_range(unsigned long start, unsigned long end);25extern void mn10300_local_icache_inv_range2(unsigned long start, unsigned long size);26extern void mn10300_local_dcache_inv(void);27extern void mn10300_local_dcache_inv_page(unsigned long start);28extern void mn10300_local_dcache_inv_range(unsigned long start, unsigned long end);29extern void mn10300_local_dcache_inv_range2(unsigned long start, unsigned long size);30extern void mn10300_icache_inv(void);31extern void mn10300_icache_inv_page(unsigned long start);32extern void mn10300_icache_inv_range(unsigned long start, unsigned long end);33extern void mn10300_icache_inv_range2(unsigned long start, unsigned long size);34extern void mn10300_dcache_inv(void);35extern void mn10300_dcache_inv_page(unsigned long start);36extern void mn10300_dcache_inv_range(unsigned long start, unsigned long end);37extern void mn10300_dcache_inv_range2(unsigned long start, unsigned long size);38#ifdef CONFIG_MN10300_CACHE_WBACK39extern void mn10300_local_dcache_flush(void);40extern void mn10300_local_dcache_flush_page(unsigned long start);41extern void mn10300_local_dcache_flush_range(unsigned long start, unsigned long end);42extern void mn10300_local_dcache_flush_range2(unsigned long start, unsigned long size);43extern void mn10300_local_dcache_flush_inv(void);44extern void mn10300_local_dcache_flush_inv_page(unsigned long start);45extern void mn10300_local_dcache_flush_inv_range(unsigned long start, unsigned long end);46extern void mn10300_local_dcache_flush_inv_range2(unsigned long start, unsigned long size);47extern void mn10300_dcache_flush(void);48extern void mn10300_dcache_flush_page(unsigned long start);49extern void mn10300_dcache_flush_range(unsigned long start, unsigned long end);50extern void mn10300_dcache_flush_range2(unsigned long start, unsigned long size);51extern void mn10300_dcache_flush_inv(void);52extern void mn10300_dcache_flush_inv_page(unsigned long start);53extern void mn10300_dcache_flush_inv_range(unsigned long start, unsigned long end);54extern void mn10300_dcache_flush_inv_range2(unsigned long start, unsigned long size);55#else56#define mn10300_local_dcache_flush() do {} while (0)57#define mn10300_local_dcache_flush_page(start) do {} while (0)58#define mn10300_local_dcache_flush_range(start, end) do {} while (0)59#define mn10300_local_dcache_flush_range2(start, size) do {} while (0)60#define mn10300_local_dcache_flush_inv() \61mn10300_local_dcache_inv()62#define mn10300_local_dcache_flush_inv_page(start) \63mn10300_local_dcache_inv_page(start)64#define mn10300_local_dcache_flush_inv_range(start, end) \65mn10300_local_dcache_inv_range(start, end)66#define mn10300_local_dcache_flush_inv_range2(start, size) \67mn10300_local_dcache_inv_range2(start, size)68#define mn10300_dcache_flush() do {} while (0)69#define mn10300_dcache_flush_page(start) do {} while (0)70#define mn10300_dcache_flush_range(start, end) do {} while (0)71#define mn10300_dcache_flush_range2(start, size) do {} while (0)72#define mn10300_dcache_flush_inv() mn10300_dcache_inv()73#define mn10300_dcache_flush_inv_page(start) \74mn10300_dcache_inv_page((start))75#define mn10300_dcache_flush_inv_range(start, end) \76mn10300_dcache_inv_range((start), (end))77#define mn10300_dcache_flush_inv_range2(start, size) \78mn10300_dcache_inv_range2((start), (size))79#endif /* CONFIG_MN10300_CACHE_WBACK */80#else81#define mn10300_local_icache_inv() do {} while (0)82#define mn10300_local_icache_inv_page(start) do {} while (0)83#define mn10300_local_icache_inv_range(start, end) do {} while (0)84#define mn10300_local_icache_inv_range2(start, size) do {} while (0)85#define mn10300_local_dcache_inv() do {} while (0)86#define mn10300_local_dcache_inv_page(start) do {} while (0)87#define mn10300_local_dcache_inv_range(start, end) do {} while (0)88#define mn10300_local_dcache_inv_range2(start, size) do {} while (0)89#define mn10300_local_dcache_flush() do {} while (0)90#define mn10300_local_dcache_flush_inv_page(start) do {} while (0)91#define mn10300_local_dcache_flush_inv() do {} while (0)92#define mn10300_local_dcache_flush_inv_range(start, end)do {} while (0)93#define mn10300_local_dcache_flush_inv_range2(start, size) do {} while (0)94#define mn10300_local_dcache_flush_page(start) do {} while (0)95#define mn10300_local_dcache_flush_range(start, end) do {} while (0)96#define mn10300_local_dcache_flush_range2(start, size) do {} while (0)97#define mn10300_icache_inv() do {} while (0)98#define mn10300_icache_inv_page(start) do {} while (0)99#define mn10300_icache_inv_range(start, end) do {} while (0)100#define mn10300_icache_inv_range2(start, size) do {} while (0)101#define mn10300_dcache_inv() do {} while (0)102#define mn10300_dcache_inv_page(start) do {} while (0)103#define mn10300_dcache_inv_range(start, end) do {} while (0)104#define mn10300_dcache_inv_range2(start, size) do {} while (0)105#define mn10300_dcache_flush() do {} while (0)106#define mn10300_dcache_flush_inv_page(start) do {} while (0)107#define mn10300_dcache_flush_inv() do {} while (0)108#define mn10300_dcache_flush_inv_range(start, end) do {} while (0)109#define mn10300_dcache_flush_inv_range2(start, size) do {} while (0)110#define mn10300_dcache_flush_page(start) do {} while (0)111#define mn10300_dcache_flush_range(start, end) do {} while (0)112#define mn10300_dcache_flush_range2(start, size) do {} while (0)113#endif /* CONFIG_MN10300_CACHE_ENABLED */114115/*116* Virtually-indexed cache management (our cache is physically indexed)117*/118#define flush_cache_all() do {} while (0)119#define flush_cache_mm(mm) do {} while (0)120#define flush_cache_dup_mm(mm) do {} while (0)121#define flush_cache_range(mm, start, end) do {} while (0)122#define flush_cache_page(vma, vmaddr, pfn) do {} while (0)123#define flush_cache_vmap(start, end) do {} while (0)124#define flush_cache_vunmap(start, end) do {} while (0)125#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0126#define flush_dcache_page(page) do {} while (0)127#define flush_dcache_mmap_lock(mapping) do {} while (0)128#define flush_dcache_mmap_unlock(mapping) do {} while (0)129130/*131* Physically-indexed cache management132*/133#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE)134extern void flush_icache_page(struct vm_area_struct *vma, struct page *page);135extern void flush_icache_range(unsigned long start, unsigned long end);136#elif defined(CONFIG_MN10300_CACHE_INV_ICACHE)137static inline void flush_icache_page(struct vm_area_struct *vma,138struct page *page)139{140mn10300_icache_inv_page(page_to_phys(page));141}142extern void flush_icache_range(unsigned long start, unsigned long end);143#else144#define flush_icache_range(start, end) do {} while (0)145#define flush_icache_page(vma, pg) do {} while (0)146#endif147148149#define flush_icache_user_range(vma, pg, adr, len) \150flush_icache_range(adr, adr + len)151152#define copy_to_user_page(vma, page, vaddr, dst, src, len) \153do { \154memcpy(dst, src, len); \155flush_icache_page(vma, page); \156} while (0)157158#define copy_from_user_page(vma, page, vaddr, dst, src, len) \159memcpy(dst, src, len)160161/*162* Internal debugging function163*/164#ifdef CONFIG_DEBUG_PAGEALLOC165extern void kernel_map_pages(struct page *page, int numpages, int enable);166#endif167168#endif /* __ASSEMBLY__ */169170#endif /* _ASM_CACHEFLUSH_H */171172173