Path: blob/master/arch/mn10300/mm/cache-dbg-inv-by-reg.S
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/* MN10300 CPU cache invalidation routines, using automatic purge registers1*2* Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.3* Written by David Howells ([email protected])4*5* This program is free software; you can redistribute it and/or6* modify it under the terms of the GNU General Public Licence7* as published by the Free Software Foundation; either version8* 2 of the Licence, or (at your option) any later version.9*/10#include <linux/sys.h>11#include <linux/linkage.h>12#include <asm/cache.h>13#include <asm/irqflags.h>14#include <asm/cacheflush.h>15#include "cache.inc"1617.am33_21819.globl debugger_local_cache_flushinv_one2021###############################################################################22#23# void debugger_local_cache_flushinv_one(u8 *addr)24#25# Invalidate one particular cacheline if it's in the icache26#27###############################################################################28ALIGN29.globl debugger_local_cache_flushinv_one30.type debugger_local_cache_flushinv_one,@function31debugger_local_cache_flushinv_one:32mov d0,a13334mov CHCTR,a035movhu (a0),d036btst CHCTR_ICEN,d037beq mn10300_local_icache_inv_range_reg_end3839LOCAL_CLI_SAVE(d1)4041mov ICIVCR,a04243# wait for the invalidator to quiesce44setlb45mov (a0),d046btst ICIVCR_ICIVBSY,d047lne4849# set the mask50mov ~L1_CACHE_TAG_MASK,d051mov d0,(ICIVMR)5253# invalidate the cache line at the given address54and ~L1_CACHE_TAG_MASK,a155or ICIVCR_ICI,a156mov a1,(a0)5758# wait for the invalidator to quiesce again59setlb60mov (a0),d061btst ICIVCR_ICIVBSY,d062lne6364LOCAL_IRQ_RESTORE(d1)6566mn10300_local_icache_inv_range_reg_end:67ret [],068.size debugger_local_cache_flushinv_one,.-debugger_local_cache_flushinv_one697071