Path: blob/master/arch/mn10300/mm/cache-flush-icache.c
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/* Flush dcache and invalidate icache when the dcache is in writeback mode1*2* Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.3* Written by David Howells ([email protected])4*5* This program is free software; you can redistribute it and/or6* modify it under the terms of the GNU General Public Licence7* as published by the Free Software Foundation; either version8* 2 of the Licence, or (at your option) any later version.9*/10#include <linux/module.h>11#include <linux/mm.h>12#include <asm/cacheflush.h>13#include <asm/smp.h>14#include "cache-smp.h"1516/**17* flush_icache_page - Flush a page from the dcache and invalidate the icache18* @vma: The VMA the page is part of.19* @page: The page to be flushed.20*21* Write a page back from the dcache and invalidate the icache so that we can22* run code from it that we've just written into it23*/24void flush_icache_page(struct vm_area_struct *vma, struct page *page)25{26unsigned long start = page_to_phys(page);27unsigned long flags;2829flags = smp_lock_cache();3031mn10300_local_dcache_flush_page(start);32mn10300_local_icache_inv_page(start);3334smp_cache_call(SMP_IDCACHE_INV_FLUSH_RANGE, start, start + PAGE_SIZE);35smp_unlock_cache(flags);36}37EXPORT_SYMBOL(flush_icache_page);3839/**40* flush_icache_page_range - Flush dcache and invalidate icache for part of a41* single page42* @start: The starting virtual address of the page part.43* @end: The ending virtual address of the page part.44*45* Flush the dcache and invalidate the icache for part of a single page, as46* determined by the virtual addresses given. The page must be in the paged47* area.48*/49static void flush_icache_page_range(unsigned long start, unsigned long end)50{51unsigned long addr, size, off;52struct page *page;53pgd_t *pgd;54pud_t *pud;55pmd_t *pmd;56pte_t *ppte, pte;5758/* work out how much of the page to flush */59off = start & ~PAGE_MASK;60size = end - start;6162/* get the physical address the page is mapped to from the page63* tables */64pgd = pgd_offset(current->mm, start);65if (!pgd || !pgd_val(*pgd))66return;6768pud = pud_offset(pgd, start);69if (!pud || !pud_val(*pud))70return;7172pmd = pmd_offset(pud, start);73if (!pmd || !pmd_val(*pmd))74return;7576ppte = pte_offset_map(pmd, start);77if (!ppte)78return;79pte = *ppte;80pte_unmap(ppte);8182if (pte_none(pte))83return;8485page = pte_page(pte);86if (!page)87return;8889addr = page_to_phys(page);9091/* flush the dcache and invalidate the icache coverage on that92* region */93mn10300_local_dcache_flush_range2(addr + off, size);94mn10300_local_icache_inv_range2(addr + off, size);95smp_cache_call(SMP_IDCACHE_INV_FLUSH_RANGE, start, end);96}9798/**99* flush_icache_range - Globally flush dcache and invalidate icache for region100* @start: The starting virtual address of the region.101* @end: The ending virtual address of the region.102*103* This is used by the kernel to globally flush some code it has just written104* from the dcache back to RAM and then to globally invalidate the icache over105* that region so that that code can be run on all CPUs in the system.106*/107void flush_icache_range(unsigned long start, unsigned long end)108{109unsigned long start_page, end_page;110unsigned long flags;111112flags = smp_lock_cache();113114if (end > 0x80000000UL) {115/* addresses above 0xa0000000 do not go through the cache */116if (end > 0xa0000000UL) {117end = 0xa0000000UL;118if (start >= end)119goto done;120}121122/* kernel addresses between 0x80000000 and 0x9fffffff do not123* require page tables, so we just map such addresses124* directly */125start_page = (start >= 0x80000000UL) ? start : 0x80000000UL;126mn10300_local_dcache_flush_range(start_page, end);127mn10300_local_icache_inv_range(start_page, end);128smp_cache_call(SMP_IDCACHE_INV_FLUSH_RANGE, start_page, end);129if (start_page == start)130goto done;131end = start_page;132}133134start_page = start & PAGE_MASK;135end_page = (end - 1) & PAGE_MASK;136137if (start_page == end_page) {138/* the first and last bytes are on the same page */139flush_icache_page_range(start, end);140} else if (start_page + 1 == end_page) {141/* split over two virtually contiguous pages */142flush_icache_page_range(start, end_page);143flush_icache_page_range(end_page, end);144} else {145/* more than 2 pages; just flush the entire cache */146mn10300_dcache_flush();147mn10300_icache_inv();148smp_cache_call(SMP_IDCACHE_INV_FLUSH, 0, 0);149}150151done:152smp_unlock_cache(flags);153}154EXPORT_SYMBOL(flush_icache_range);155156157