#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/mmu_context.h>
#include <asm/tlbflush.h>
#ifdef CONFIG_MN10300_TLB_USE_PIDR
unsigned long mmu_context_cache[NR_CPUS] = {
[0 ... NR_CPUS - 1] =
MMU_CONTEXT_FIRST_VERSION * 2 - (1 - MMU_CONTEXT_TLBPID_LOCK_NR),
};
#endif
void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
{
unsigned long pteu, ptel, cnx, flags;
pte_t pte = *ptep;
addr &= PAGE_MASK;
ptel = pte_val(pte) & ~(xPTEL_UNUSED1 | xPTEL_UNUSED2);
local_irq_save(flags);
cnx = ~MMU_NO_CONTEXT;
#ifdef CONFIG_MN10300_TLB_USE_PIDR
cnx = mm_context(vma->vm_mm);
#endif
if (cnx != MMU_NO_CONTEXT) {
pteu = addr;
#ifdef CONFIG_MN10300_TLB_USE_PIDR
pteu |= cnx & MMU_CONTEXT_TLBPID_MASK;
#endif
if (!(pte_val(pte) & _PAGE_NX)) {
IPTEU = pteu;
if (IPTEL & xPTEL_V)
IPTEL = ptel;
}
DPTEU = pteu;
if (DPTEL & xPTEL_V)
DPTEL = ptel;
}
local_irq_restore(flags);
}