Path: blob/master/arch/mn10300/unit-asb2303/include/unit/serial.h
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/* ASB2303-specific 8250 serial ports1*2* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.3* Written by David Howells ([email protected])4*5* This program is free software; you can redistribute it and/or6* modify it under the terms of the GNU General Public Licence7* as published by the Free Software Foundation; either version8* 2 of the Licence, or (at your option) any later version.9*/1011#ifndef _ASM_UNIT_SERIAL_H12#define _ASM_UNIT_SERIAL_H1314#include <asm/cpu-regs.h>15#include <proc/irq.h>16#include <linux/serial_reg.h>1718#define SERIAL_PORT0_BASE_ADDRESS 0xA6FB000019#define SERIAL_PORT1_BASE_ADDRESS 0xA6FC00002021#define SERIAL_IRQ XIRQ0 /* Dual serial (PC16552) (Hi) */2223/*24* The ASB2303 has an 18.432 MHz clock the UART25*/26#define BASE_BAUD (18432000 / 16)2728/*29* dispose of the /dev/ttyS0 and /dev/ttyS1 serial ports30*/31#ifndef CONFIG_GDBSTUB_ON_TTYSx3233#define SERIAL_PORT_DFNS \34{ \35.baud_base = BASE_BAUD, \36.irq = SERIAL_IRQ, \37.flags = STD_COM_FLAGS, \38.iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \39.iomem_reg_shift = 2, \40.io_type = SERIAL_IO_MEM, \41}, \42{ \43.baud_base = BASE_BAUD, \44.irq = SERIAL_IRQ, \45.flags = STD_COM_FLAGS, \46.iomem_base = (u8 *) SERIAL_PORT1_BASE_ADDRESS, \47.iomem_reg_shift = 2, \48.io_type = SERIAL_IO_MEM, \49},5051#ifndef __ASSEMBLY__5253static inline void __debug_to_serial(const char *p, int n)54{55}5657#endif /* !__ASSEMBLY__ */5859#else /* CONFIG_GDBSTUB_ON_TTYSx */6061#define SERIAL_PORT_DFNS /* both stolen by gdb-stub because they share an IRQ */6263#if defined(CONFIG_GDBSTUB_ON_TTYS0)64#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)65#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)66#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)67#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)68#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)69#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)70#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)71#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)72#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)73#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)74#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)75#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)76#define GDBPORT_SERIAL_IRQ SERIAL_IRQ7778#elif defined(CONFIG_GDBSTUB_ON_TTYS1)79#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_RX * 4, u8)80#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_TX * 4, u8)81#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLL * 4, u8)82#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLM * 4, u8)83#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IER * 4, u8)84#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IIR * 4, u8)85#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_FCR * 4, u8)86#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LCR * 4, u8)87#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MCR * 4, u8)88#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LSR * 4, u8)89#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MSR * 4, u8)90#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_SCR * 4, u8)91#define GDBPORT_SERIAL_IRQ SERIAL_IRQ92#endif9394#ifndef __ASSEMBLY__9596#define LSR_WAIT_FOR(STATE) \97do { \98while (!(GDBPORT_SERIAL_LSR & UART_LSR_##STATE)) {} \99} while (0)100#define FLOWCTL_WAIT_FOR(LINE) \101do { \102while (!(GDBPORT_SERIAL_MSR & UART_MSR_##LINE)) {} \103} while (0)104#define FLOWCTL_CLEAR(LINE) \105do { \106GDBPORT_SERIAL_MCR &= ~UART_MCR_##LINE; \107} while (0)108#define FLOWCTL_SET(LINE) \109do { \110GDBPORT_SERIAL_MCR |= UART_MCR_##LINE; \111} while (0)112#define FLOWCTL_QUERY(LINE) ({ GDBPORT_SERIAL_MSR & UART_MSR_##LINE; })113114static inline void __debug_to_serial(const char *p, int n)115{116char ch;117118FLOWCTL_SET(DTR);119120for (; n > 0; n--) {121LSR_WAIT_FOR(THRE);122FLOWCTL_WAIT_FOR(CTS);123124ch = *p++;125if (ch == 0x0a) {126GDBPORT_SERIAL_TX = 0x0d;127LSR_WAIT_FOR(THRE);128FLOWCTL_WAIT_FOR(CTS);129}130GDBPORT_SERIAL_TX = ch;131}132133FLOWCTL_CLEAR(DTR);134}135136#endif /* !__ASSEMBLY__ */137138#endif /* CONFIG_GDBSTUB_ON_TTYSx */139140#endif /* _ASM_UNIT_SERIAL_H */141142143