Path: blob/master/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h
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/* ASB2364 FPGA registers1*/23#ifndef _ASM_UNIT_FPGA_REGS_H4#define _ASM_UNIT_FPGA_REGS_H56#include <asm/cpu-regs.h>78#ifdef __KERNEL__910#define ASB2364_FPGA_REG_RESET_LAN __SYSREG(0xa9001300, u16)11#define ASB2364_FPGA_REG_RESET_UART __SYSREG(0xa9001304, u16)12#define ASB2364_FPGA_REG_RESET_I2C __SYSREG(0xa9001308, u16)13#define ASB2364_FPGA_REG_RESET_USB __SYSREG(0xa900130c, u16)14#define ASB2364_FPGA_REG_RESET_AV __SYSREG(0xa9001310, u16)1516#define ASB2364_FPGA_REG_IRQ(X) __SYSREG(0xa9001510+((X)*4), u16)17#define ASB2364_FPGA_REG_IRQ_LAN ASB2364_FPGA_REG_IRQ(0)18#define ASB2364_FPGA_REG_IRQ_UART ASB2364_FPGA_REG_IRQ(1)19#define ASB2364_FPGA_REG_IRQ_I2C ASB2364_FPGA_REG_IRQ(2)20#define ASB2364_FPGA_REG_IRQ_USB ASB2364_FPGA_REG_IRQ(3)21#define ASB2364_FPGA_REG_IRQ_FPGA ASB2364_FPGA_REG_IRQ(5)2223#define ASB2364_FPGA_REG_MASK(X) __SYSREG(0xa9001590+((X)*4), u16)24#define ASB2364_FPGA_REG_MASK_LAN ASB2364_FPGA_REG_MASK(0)25#define ASB2364_FPGA_REG_MASK_UART ASB2364_FPGA_REG_MASK(1)26#define ASB2364_FPGA_REG_MASK_I2C ASB2364_FPGA_REG_MASK(2)27#define ASB2364_FPGA_REG_MASK_USB ASB2364_FPGA_REG_MASK(3)28#define ASB2364_FPGA_REG_MASK_FPGA ASB2364_FPGA_REG_MASK(5)2930#define ASB2364_FPGA_REG_CPLD5_SET1 __SYSREG(0xa9002500, u16)31#define ASB2364_FPGA_REG_CPLD5_SET2 __SYSREG(0xa9002504, u16)32#define ASB2364_FPGA_REG_CPLD6_SET1 __SYSREG(0xa9002600, u16)33#define ASB2364_FPGA_REG_CPLD6_SET2 __SYSREG(0xa9002604, u16)34#define ASB2364_FPGA_REG_CPLD7_SET1 __SYSREG(0xa9002700, u16)35#define ASB2364_FPGA_REG_CPLD7_SET2 __SYSREG(0xa9002704, u16)36#define ASB2364_FPGA_REG_CPLD8_SET1 __SYSREG(0xa9002800, u16)37#define ASB2364_FPGA_REG_CPLD8_SET2 __SYSREG(0xa9002804, u16)38#define ASB2364_FPGA_REG_CPLD9_SET1 __SYSREG(0xa9002900, u16)39#define ASB2364_FPGA_REG_CPLD9_SET2 __SYSREG(0xa9002904, u16)40#define ASB2364_FPGA_REG_CPLD10_SET1 __SYSREG(0xa9002a00, u16)41#define ASB2364_FPGA_REG_CPLD10_SET2 __SYSREG(0xa9002a04, u16)4243#define SyncExBus() \44do { \45unsigned short w; \46w = *(volatile short *)0xa9000000; \47} while (0)4849#endif /* __KERNEL__ */5051#endif /* _ASM_UNIT_FPGA_REGS_H */525354