Path: blob/master/arch/powerpc/boot/cuboot-acadia.c
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/*1* Old U-boot compatibility for Acadia2*3* Author: Josh Boyer <[email protected]>4*5* Copyright 2008 IBM Corporation6*7* This program is free software; you can redistribute it and/or modify it8* under the terms of the GNU General Public License version 2 as published9* by the Free Software Foundation.10*/1112#include "ops.h"13#include "io.h"14#include "dcr.h"15#include "stdio.h"16#include "4xx.h"17#include "44x.h"18#include "cuboot.h"1920#define TARGET_4xx21#include "ppcboot.h"2223static bd_t bd;2425#define CPR_PERD0_SPIDV_MASK 0x000F0000 /* SPI Clock Divider */2627#define PLLC_SRC_MASK 0x20000000 /* PLL feedback source */2829#define PLLD_FBDV_MASK 0x1F000000 /* PLL feedback divider value */30#define PLLD_FWDVA_MASK 0x000F0000 /* PLL forward divider A value */31#define PLLD_FWDVB_MASK 0x00000700 /* PLL forward divider B value */3233#define PRIMAD_CPUDV_MASK 0x0F000000 /* CPU Clock Divisor Mask */34#define PRIMAD_PLBDV_MASK 0x000F0000 /* PLB Clock Divisor Mask */35#define PRIMAD_OPBDV_MASK 0x00000F00 /* OPB Clock Divisor Mask */36#define PRIMAD_EBCDV_MASK 0x0000000F /* EBC Clock Divisor Mask */3738#define PERD0_PWMDV_MASK 0xFF000000 /* PWM Divider Mask */39#define PERD0_SPIDV_MASK 0x000F0000 /* SPI Divider Mask */40#define PERD0_U0DV_MASK 0x0000FF00 /* UART 0 Divider Mask */41#define PERD0_U1DV_MASK 0x000000FF /* UART 1 Divider Mask */4243static void get_clocks(void)44{45unsigned long sysclk, cpr_plld, cpr_pllc, cpr_primad, plloutb, i;46unsigned long pllFwdDiv, pllFwdDivB, pllFbkDiv, pllPlbDiv, pllExtBusDiv;47unsigned long pllOpbDiv, freqEBC, freqUART, freqOPB;48unsigned long div; /* total divisor udiv * bdiv */49unsigned long umin; /* minimum udiv */50unsigned short diff; /* smallest diff */51unsigned long udiv; /* best udiv */52unsigned short idiff; /* current diff */53unsigned short ibdiv; /* current bdiv */54unsigned long est; /* current estimate */55unsigned long baud;56void *np;5758/* read the sysclk value from the CPLD */59sysclk = (in_8((unsigned char *)0x80000000) == 0xc) ? 66666666 : 33333000;6061/*62* Read PLL Mode registers63*/64cpr_plld = CPR0_READ(DCRN_CPR0_PLLD);65cpr_pllc = CPR0_READ(DCRN_CPR0_PLLC);6667/*68* Determine forward divider A69*/70pllFwdDiv = ((cpr_plld & PLLD_FWDVA_MASK) >> 16);7172/*73* Determine forward divider B74*/75pllFwdDivB = ((cpr_plld & PLLD_FWDVB_MASK) >> 8);76if (pllFwdDivB == 0)77pllFwdDivB = 8;7879/*80* Determine FBK_DIV.81*/82pllFbkDiv = ((cpr_plld & PLLD_FBDV_MASK) >> 24);83if (pllFbkDiv == 0)84pllFbkDiv = 256;8586/*87* Read CPR_PRIMAD register88*/89cpr_primad = CPR0_READ(DCRN_CPR0_PRIMAD);9091/*92* Determine PLB_DIV.93*/94pllPlbDiv = ((cpr_primad & PRIMAD_PLBDV_MASK) >> 16);95if (pllPlbDiv == 0)96pllPlbDiv = 16;9798/*99* Determine EXTBUS_DIV.100*/101pllExtBusDiv = (cpr_primad & PRIMAD_EBCDV_MASK);102if (pllExtBusDiv == 0)103pllExtBusDiv = 16;104105/*106* Determine OPB_DIV.107*/108pllOpbDiv = ((cpr_primad & PRIMAD_OPBDV_MASK) >> 8);109if (pllOpbDiv == 0)110pllOpbDiv = 16;111112/* There is a bug in U-Boot that prevents us from using113* bd.bi_opbfreq because U-Boot doesn't populate it for114* 405EZ. We get to calculate it, yay!115*/116freqOPB = (sysclk *pllFbkDiv) /pllOpbDiv;117118freqEBC = (sysclk * pllFbkDiv) / pllExtBusDiv;119120plloutb = ((sysclk * ((cpr_pllc & PLLC_SRC_MASK) ?121pllFwdDivB : pllFwdDiv) *122pllFbkDiv) / pllFwdDivB);123124np = find_node_by_alias("serial0");125if (getprop(np, "current-speed", &baud, sizeof(baud)) != sizeof(baud))126fatal("no current-speed property\n\r");127128udiv = 256; /* Assume lowest possible serial clk */129div = plloutb / (16 * baud); /* total divisor */130umin = (plloutb / freqOPB) << 1; /* 2 x OPB divisor */131diff = 256; /* highest possible */132133/* i is the test udiv value -- start with the largest134* possible (256) to minimize serial clock and constrain135* search to umin.136*/137for (i = 256; i > umin; i--) {138ibdiv = div / i;139est = i * ibdiv;140idiff = (est > div) ? (est-div) : (div-est);141if (idiff == 0) {142udiv = i;143break; /* can't do better */144} else if (idiff < diff) {145udiv = i; /* best so far */146diff = idiff; /* update lowest diff*/147}148}149freqUART = plloutb / udiv;150151dt_fixup_cpu_clocks(bd.bi_procfreq, bd.bi_intfreq, bd.bi_plb_busfreq);152dt_fixup_clock("/plb/ebc", freqEBC);153dt_fixup_clock("/plb/opb", freqOPB);154dt_fixup_clock("/plb/opb/serial@ef600300", freqUART);155dt_fixup_clock("/plb/opb/serial@ef600400", freqUART);156}157158static void acadia_fixups(void)159{160dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);161get_clocks();162dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);163}164165void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,166unsigned long r6, unsigned long r7)167{168CUBOOT_INIT();169platform_ops.fixups = acadia_fixups;170platform_ops.exit = ibm40x_dbcr_reset;171fdt_init(_dtb_start);172serial_console_init();173}174175176