Path: blob/master/arch/powerpc/kernel/idle_power7.S
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/*1* This file contains the power_save function for 970-family CPUs.2*3* This program is free software; you can redistribute it and/or4* modify it under the terms of the GNU General Public License5* as published by the Free Software Foundation; either version6* 2 of the License, or (at your option) any later version.7*/89#include <linux/threads.h>10#include <asm/processor.h>11#include <asm/page.h>12#include <asm/cputable.h>13#include <asm/thread_info.h>14#include <asm/ppc_asm.h>15#include <asm/asm-offsets.h>16#include <asm/ppc-opcode.h>1718#undef DEBUG1920.text2122_GLOBAL(power7_idle)23/* Now check if user or arch enabled NAP mode */24LOAD_REG_ADDRBASE(r3,powersave_nap)25lwz r4,ADDROFF(powersave_nap)(r3)26cmpwi 0,r4,027beqlr2829/* NAP is a state loss, we create a regs frame on the30* stack, fill it up with the state we care about and31* stick a pointer to it in PACAR1. We really only32* need to save PC, some CR bits and the NV GPRs,33* but for now an interrupt frame will do.34*/35mflr r036std r0,16(r1)37stdu r1,-INT_FRAME_SIZE(r1)38std r0,_LINK(r1)39std r0,_NIP(r1)4041#ifndef CONFIG_SMP42/* Make sure FPU, VSX etc... are flushed as we may lose43* state when going to nap mode44*/45bl .discard_lazy_cpu_state46#endif /* CONFIG_SMP */4748/* Hard disable interrupts */49mfmsr r950rldicl r9,r9,48,151rotldi r9,r9,1652mtmsrd r9,1 /* hard-disable interrupts */53li r0,054stb r0,PACASOFTIRQEN(r13) /* we'll hard-enable shortly */55stb r0,PACAHARDIRQEN(r13)5657/* Continue saving state */58SAVE_GPR(2, r1)59SAVE_NVGPRS(r1)60mfcr r361std r3,_CCR(r1)62std r9,_MSR(r1)63std r1,PACAR1(r13)6465/* Magic NAP mode enter sequence */66std r0,0(r1)67ptesync68ld r0,0(r1)691: cmp cr0,r0,r070bne 1b71PPC_NAP72b .7374_GLOBAL(power7_wakeup_loss)75GET_PACA(r13)76ld r1,PACAR1(r13)77REST_NVGPRS(r1)78REST_GPR(2, r1)79ld r3,_CCR(r1)80ld r4,_MSR(r1)81ld r5,_NIP(r1)82addi r1,r1,INT_FRAME_SIZE83mtcr r384mtspr SPRN_SRR1,r485mtspr SPRN_SRR0,r586rfid8788_GLOBAL(power7_wakeup_noloss)89GET_PACA(r13)90ld r1,PACAR1(r13)91ld r4,_MSR(r1)92ld r5,_NIP(r1)93addi r1,r1,INT_FRAME_SIZE94mtspr SPRN_SRR1,r495mtspr SPRN_SRR0,r596rfid979899