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awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/powerpc/lib/checksum_32.S
10818 views
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/*
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* This file contains assembly-language implementations
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* of IP-style 1's complement checksum routines.
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*
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* Copyright (C) 1995-1996 Gary Thomas ([email protected])
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* Severely hacked about by Paul Mackerras ([email protected]).
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*/
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#include <linux/sys.h>
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#include <asm/processor.h>
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#include <asm/errno.h>
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#include <asm/ppc_asm.h>
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.text
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/*
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* ip_fast_csum(buf, len) -- Optimized for IP header
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* len is in words and is always >= 5.
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*/
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_GLOBAL(ip_fast_csum)
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lwz r0,0(r3)
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lwzu r5,4(r3)
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addic. r4,r4,-2
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addc r0,r0,r5
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mtctr r4
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blelr-
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1: lwzu r4,4(r3)
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adde r0,r0,r4
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bdnz 1b
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addze r0,r0 /* add in final carry */
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rlwinm r3,r0,16,0,31 /* fold two halves together */
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add r3,r0,r3
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not r3,r3
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srwi r3,r3,16
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blr
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/*
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* Compute checksum of TCP or UDP pseudo-header:
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* csum_tcpudp_magic(saddr, daddr, len, proto, sum)
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*/
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_GLOBAL(csum_tcpudp_magic)
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rlwimi r5,r6,16,0,15 /* put proto in upper half of len */
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addc r0,r3,r4 /* add 4 32-bit words together */
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adde r0,r0,r5
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adde r0,r0,r7
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addze r0,r0 /* add in final carry */
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rlwinm r3,r0,16,0,31 /* fold two halves together */
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add r3,r0,r3
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not r3,r3
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srwi r3,r3,16
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blr
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/*
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* computes the checksum of a memory block at buff, length len,
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* and adds in "sum" (32-bit)
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*
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* csum_partial(buff, len, sum)
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*/
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_GLOBAL(csum_partial)
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addic r0,r5,0
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subi r3,r3,4
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srwi. r6,r4,2
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beq 3f /* if we're doing < 4 bytes */
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andi. r5,r3,2 /* Align buffer to longword boundary */
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beq+ 1f
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lhz r5,4(r3) /* do 2 bytes to get aligned */
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addi r3,r3,2
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subi r4,r4,2
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addc r0,r0,r5
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srwi. r6,r4,2 /* # words to do */
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beq 3f
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1: mtctr r6
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2: lwzu r5,4(r3) /* the bdnz has zero overhead, so it should */
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adde r0,r0,r5 /* be unnecessary to unroll this loop */
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bdnz 2b
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andi. r4,r4,3
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3: cmpwi 0,r4,2
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blt+ 4f
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lhz r5,4(r3)
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addi r3,r3,2
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subi r4,r4,2
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adde r0,r0,r5
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4: cmpwi 0,r4,1
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bne+ 5f
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lbz r5,4(r3)
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slwi r5,r5,8 /* Upper byte of word */
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adde r0,r0,r5
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5: addze r3,r0 /* add in final carry */
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blr
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/*
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* Computes the checksum of a memory block at src, length len,
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* and adds in "sum" (32-bit), while copying the block to dst.
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* If an access exception occurs on src or dst, it stores -EFAULT
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* to *src_err or *dst_err respectively, and (for an error on
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* src) zeroes the rest of dst.
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*
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* csum_partial_copy_generic(src, dst, len, sum, src_err, dst_err)
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*/
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_GLOBAL(csum_partial_copy_generic)
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addic r0,r6,0
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subi r3,r3,4
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subi r4,r4,4
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srwi. r6,r5,2
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beq 3f /* if we're doing < 4 bytes */
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andi. r9,r4,2 /* Align dst to longword boundary */
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beq+ 1f
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81: lhz r6,4(r3) /* do 2 bytes to get aligned */
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addi r3,r3,2
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subi r5,r5,2
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91: sth r6,4(r4)
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addi r4,r4,2
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addc r0,r0,r6
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srwi. r6,r5,2 /* # words to do */
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beq 3f
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1: srwi. r6,r5,4 /* # groups of 4 words to do */
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beq 10f
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mtctr r6
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71: lwz r6,4(r3)
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72: lwz r9,8(r3)
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73: lwz r10,12(r3)
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74: lwzu r11,16(r3)
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adde r0,r0,r6
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75: stw r6,4(r4)
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adde r0,r0,r9
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76: stw r9,8(r4)
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adde r0,r0,r10
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77: stw r10,12(r4)
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adde r0,r0,r11
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78: stwu r11,16(r4)
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bdnz 71b
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10: rlwinm. r6,r5,30,30,31 /* # words left to do */
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beq 13f
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mtctr r6
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82: lwzu r9,4(r3)
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92: stwu r9,4(r4)
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adde r0,r0,r9
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bdnz 82b
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13: andi. r5,r5,3
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3: cmpwi 0,r5,2
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blt+ 4f
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83: lhz r6,4(r3)
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addi r3,r3,2
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subi r5,r5,2
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93: sth r6,4(r4)
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addi r4,r4,2
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adde r0,r0,r6
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4: cmpwi 0,r5,1
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bne+ 5f
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84: lbz r6,4(r3)
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94: stb r6,4(r4)
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slwi r6,r6,8 /* Upper byte of word */
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adde r0,r0,r6
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5: addze r3,r0 /* add in final carry */
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blr
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/* These shouldn't go in the fixup section, since that would
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cause the ex_table addresses to get out of order. */
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src_error_4:
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mfctr r6 /* update # bytes remaining from ctr */
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rlwimi r5,r6,4,0,27
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b 79f
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src_error_1:
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li r6,0
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subi r5,r5,2
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95: sth r6,4(r4)
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addi r4,r4,2
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79: srwi. r6,r5,2
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beq 3f
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mtctr r6
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src_error_2:
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li r6,0
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96: stwu r6,4(r4)
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bdnz 96b
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3: andi. r5,r5,3
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beq src_error
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src_error_3:
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li r6,0
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mtctr r5
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addi r4,r4,3
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97: stbu r6,1(r4)
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bdnz 97b
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src_error:
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cmpwi 0,r7,0
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beq 1f
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li r6,-EFAULT
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stw r6,0(r7)
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1: addze r3,r0
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blr
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dst_error:
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cmpwi 0,r8,0
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beq 1f
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li r6,-EFAULT
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stw r6,0(r8)
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1: addze r3,r0
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blr
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.section __ex_table,"a"
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.long 81b,src_error_1
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.long 91b,dst_error
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.long 71b,src_error_4
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.long 72b,src_error_4
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.long 73b,src_error_4
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.long 74b,src_error_4
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.long 75b,dst_error
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.long 76b,dst_error
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.long 77b,dst_error
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.long 78b,dst_error
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.long 82b,src_error_2
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.long 92b,dst_error
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.long 83b,src_error_3
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.long 93b,dst_error
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.long 84b,src_error_3
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.long 94b,dst_error
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.long 95b,dst_error
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.long 96b,dst_error
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.long 97b,dst_error
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