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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/powerpc/lib/copypage_64.S
10817 views
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/*

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 * Copyright (C) 2008 Mark Nelson, IBM Corp.

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 *

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 * This program is free software; you can redistribute it and/or

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 * modify it under the terms of the GNU General Public License

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 * as published by the Free Software Foundation; either version

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 * 2 of the License, or (at your option) any later version.

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 */

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#include <asm/page.h>

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#include <asm/processor.h>

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#include <asm/ppc_asm.h>

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#include <asm/asm-offsets.h>

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        .section        ".toc","aw"

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PPC64_CACHES:

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        .tc             ppc64_caches[TC],ppc64_caches

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        .section        ".text"

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_GLOBAL(copy_page)

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	lis	r5,PAGE_SIZE@h

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	ori	r5,r5,PAGE_SIZE@l

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BEGIN_FTR_SECTION

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	ld      r10,PPC64_CACHES@toc(r2)

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	lwz	r11,DCACHEL1LOGLINESIZE(r10)	/* log2 of cache line size */

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	lwz     r12,DCACHEL1LINESIZE(r10)	/* get cache line size */

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	li	r9,0

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	srd	r8,r5,r11

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	mtctr	r8

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.Lsetup:

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	dcbt	r9,r4

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	dcbz	r9,r3

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	add	r9,r9,r12

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	bdnz	.Lsetup

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END_FTR_SECTION_IFSET(CPU_FTR_CP_USE_DCBTZ)

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	addi	r3,r3,-8

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	srdi    r8,r5,7		/* page is copied in 128 byte strides */

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	addi	r8,r8,-1	/* one stride copied outside loop */

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	mtctr	r8

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	ld	r5,0(r4)

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	ld	r6,8(r4)

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	ld	r7,16(r4)

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	ldu	r8,24(r4)

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1:	std	r5,8(r3)

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	std	r6,16(r3)

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	ld	r9,8(r4)

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	ld	r10,16(r4)

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	std	r7,24(r3)

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	std	r8,32(r3)

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	ld	r11,24(r4)

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	ld	r12,32(r4)

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	std	r9,40(r3)

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	std	r10,48(r3)

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	ld	r5,40(r4)

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	ld	r6,48(r4)

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	std	r11,56(r3)

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	std	r12,64(r3)

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	ld	r7,56(r4)

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	ld	r8,64(r4)

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	std	r5,72(r3)

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	std	r6,80(r3)

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	ld	r9,72(r4)

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	ld	r10,80(r4)

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	std	r7,88(r3)

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	std	r8,96(r3)

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	ld	r11,88(r4)

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	ld	r12,96(r4)

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	std	r9,104(r3)

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	std	r10,112(r3)

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	ld	r5,104(r4)

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	ld	r6,112(r4)

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	std	r11,120(r3)

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	stdu	r12,128(r3)

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	ld	r7,120(r4)

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	ldu	r8,128(r4)

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	bdnz	1b

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	std	r5,8(r3)

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	std	r6,16(r3)

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	ld	r9,8(r4)

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	ld	r10,16(r4)

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	std	r7,24(r3)

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	std	r8,32(r3)

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	ld	r11,24(r4)

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	ld	r12,32(r4)

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	std	r9,40(r3)

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	std	r10,48(r3)

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	ld	r5,40(r4)

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	ld	r6,48(r4)

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	std	r11,56(r3)

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	std	r12,64(r3)

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	ld	r7,56(r4)

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	ld	r8,64(r4)

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	std	r5,72(r3)

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	std	r6,80(r3)

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	ld	r9,72(r4)

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	ld	r10,80(r4)

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	std	r7,88(r3)

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	std	r8,96(r3)

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	ld	r11,88(r4)

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	ld	r12,96(r4)

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	std	r9,104(r3)

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	std	r10,112(r3)

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	std	r11,120(r3)

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	std	r12,128(r3)

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	blr

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