/*1* This file contains common routines for dealing with free of page tables2* Along with common page table handling code3*4* Derived from arch/powerpc/mm/tlb_64.c:5* Copyright (C) 1995-1996 Gary Thomas ([email protected])6*7* Modifications by Paul Mackerras (PowerMac) ([email protected])8* and Cort Dougan (PReP) ([email protected])9* Copyright (C) 1996 Paul Mackerras10*11* Derived from "arch/i386/mm/init.c"12* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds13*14* Dave Engebretsen <[email protected]>15* Rework for PPC64 port.16*17* This program is free software; you can redistribute it and/or18* modify it under the terms of the GNU General Public License19* as published by the Free Software Foundation; either version20* 2 of the License, or (at your option) any later version.21*/2223#include <linux/kernel.h>24#include <linux/gfp.h>25#include <linux/mm.h>26#include <linux/init.h>27#include <linux/percpu.h>28#include <linux/hardirq.h>29#include <asm/pgalloc.h>30#include <asm/tlbflush.h>31#include <asm/tlb.h>3233#include "mmu_decl.h"3435static inline int is_exec_fault(void)36{37return current->thread.regs && TRAP(current->thread.regs) == 0x400;38}3940/* We only try to do i/d cache coherency on stuff that looks like41* reasonably "normal" PTEs. We currently require a PTE to be present42* and we avoid _PAGE_SPECIAL and _PAGE_NO_CACHE. We also only do that43* on userspace PTEs44*/45static inline int pte_looks_normal(pte_t pte)46{47return (pte_val(pte) &48(_PAGE_PRESENT | _PAGE_SPECIAL | _PAGE_NO_CACHE | _PAGE_USER)) ==49(_PAGE_PRESENT | _PAGE_USER);50}5152struct page * maybe_pte_to_page(pte_t pte)53{54unsigned long pfn = pte_pfn(pte);55struct page *page;5657if (unlikely(!pfn_valid(pfn)))58return NULL;59page = pfn_to_page(pfn);60if (PageReserved(page))61return NULL;62return page;63}6465#if defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 06667/* Server-style MMU handles coherency when hashing if HW exec permission68* is supposed per page (currently 64-bit only). If not, then, we always69* flush the cache for valid PTEs in set_pte. Embedded CPU without HW exec70* support falls into the same category.71*/7273static pte_t set_pte_filter(pte_t pte, unsigned long addr)74{75pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);76if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||77cpu_has_feature(CPU_FTR_NOEXECUTE))) {78struct page *pg = maybe_pte_to_page(pte);79if (!pg)80return pte;81if (!test_bit(PG_arch_1, &pg->flags)) {82#ifdef CONFIG_8xx83/* On 8xx, cache control instructions (particularly84* "dcbst" from flush_dcache_icache) fault as write85* operation if there is an unpopulated TLB entry86* for the address in question. To workaround that,87* we invalidate the TLB here, thus avoiding dcbst88* misbehaviour.89*/90/* 8xx doesn't care about PID, size or ind args */91_tlbil_va(addr, 0, 0, 0);92#endif /* CONFIG_8xx */93flush_dcache_icache_page(pg);94set_bit(PG_arch_1, &pg->flags);95}96}97return pte;98}99100static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,101int dirty)102{103return pte;104}105106#else /* defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0 */107108/* Embedded type MMU with HW exec support. This is a bit more complicated109* as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so110* instead we "filter out" the exec permission for non clean pages.111*/112static pte_t set_pte_filter(pte_t pte, unsigned long addr)113{114struct page *pg;115116/* No exec permission in the first place, move on */117if (!(pte_val(pte) & _PAGE_EXEC) || !pte_looks_normal(pte))118return pte;119120/* If you set _PAGE_EXEC on weird pages you're on your own */121pg = maybe_pte_to_page(pte);122if (unlikely(!pg))123return pte;124125/* If the page clean, we move on */126if (test_bit(PG_arch_1, &pg->flags))127return pte;128129/* If it's an exec fault, we flush the cache and make it clean */130if (is_exec_fault()) {131flush_dcache_icache_page(pg);132set_bit(PG_arch_1, &pg->flags);133return pte;134}135136/* Else, we filter out _PAGE_EXEC */137return __pte(pte_val(pte) & ~_PAGE_EXEC);138}139140static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,141int dirty)142{143struct page *pg;144145/* So here, we only care about exec faults, as we use them146* to recover lost _PAGE_EXEC and perform I$/D$ coherency147* if necessary. Also if _PAGE_EXEC is already set, same deal,148* we just bail out149*/150if (dirty || (pte_val(pte) & _PAGE_EXEC) || !is_exec_fault())151return pte;152153#ifdef CONFIG_DEBUG_VM154/* So this is an exec fault, _PAGE_EXEC is not set. If it was155* an error we would have bailed out earlier in do_page_fault()156* but let's make sure of it157*/158if (WARN_ON(!(vma->vm_flags & VM_EXEC)))159return pte;160#endif /* CONFIG_DEBUG_VM */161162/* If you set _PAGE_EXEC on weird pages you're on your own */163pg = maybe_pte_to_page(pte);164if (unlikely(!pg))165goto bail;166167/* If the page is already clean, we move on */168if (test_bit(PG_arch_1, &pg->flags))169goto bail;170171/* Clean the page and set PG_arch_1 */172flush_dcache_icache_page(pg);173set_bit(PG_arch_1, &pg->flags);174175bail:176return __pte(pte_val(pte) | _PAGE_EXEC);177}178179#endif /* !(defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0) */180181/*182* set_pte stores a linux PTE into the linux page table.183*/184void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,185pte_t pte)186{187#ifdef CONFIG_DEBUG_VM188WARN_ON(pte_present(*ptep));189#endif190/* Note: mm->context.id might not yet have been assigned as191* this context might not have been activated yet when this192* is called.193*/194pte = set_pte_filter(pte, addr);195196/* Perform the setting of the PTE */197__set_pte_at(mm, addr, ptep, pte, 0);198}199200/*201* This is called when relaxing access to a PTE. It's also called in the page202* fault path when we don't hit any of the major fault cases, ie, a minor203* update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have204* handled those two for us, we additionally deal with missing execute205* permission here on some processors206*/207int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,208pte_t *ptep, pte_t entry, int dirty)209{210int changed;211entry = set_access_flags_filter(entry, vma, dirty);212changed = !pte_same(*(ptep), entry);213if (changed) {214if (!(vma->vm_flags & VM_HUGETLB))215assert_pte_locked(vma->vm_mm, address);216__ptep_set_access_flags(ptep, entry);217flush_tlb_page_nohash(vma, address);218}219return changed;220}221222#ifdef CONFIG_DEBUG_VM223void assert_pte_locked(struct mm_struct *mm, unsigned long addr)224{225pgd_t *pgd;226pud_t *pud;227pmd_t *pmd;228229if (mm == &init_mm)230return;231pgd = mm->pgd + pgd_index(addr);232BUG_ON(pgd_none(*pgd));233pud = pud_offset(pgd, addr);234BUG_ON(pud_none(*pud));235pmd = pmd_offset(pud, addr);236BUG_ON(!pmd_present(*pmd));237assert_spin_locked(pte_lockptr(mm, pmd));238}239#endif /* CONFIG_DEBUG_VM */240241242243