Path: blob/master/arch/powerpc/platforms/embedded6xx/flipper-pic.c
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/*1* arch/powerpc/platforms/embedded6xx/flipper-pic.c2*3* Nintendo GameCube/Wii "Flipper" interrupt controller support.4* Copyright (C) 2004-2009 The GameCube Linux Team5* Copyright (C) 2007,2008,2009 Albert Herranz6*7* This program is free software; you can redistribute it and/or8* modify it under the terms of the GNU General Public License9* as published by the Free Software Foundation; either version 210* of the License, or (at your option) any later version.11*12*/13#define DRV_MODULE_NAME "flipper-pic"14#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt1516#include <linux/kernel.h>17#include <linux/init.h>18#include <linux/irq.h>19#include <linux/of.h>20#include <asm/io.h>2122#include "flipper-pic.h"2324#define FLIPPER_NR_IRQS 322526/*27* Each interrupt has a corresponding bit in both28* the Interrupt Cause (ICR) and Interrupt Mask (IMR) registers.29*30* Enabling/disabling an interrupt line involves setting/clearing31* the corresponding bit in IMR.32* Except for the RSW interrupt, all interrupts get deasserted automatically33* when the source deasserts the interrupt.34*/35#define FLIPPER_ICR 0x0036#define FLIPPER_ICR_RSS (1<<16) /* reset switch state */3738#define FLIPPER_IMR 0x043940#define FLIPPER_RESET 0x24414243/*44* IRQ chip hooks.45*46*/4748static void flipper_pic_mask_and_ack(struct irq_data *d)49{50int irq = irqd_to_hwirq(d);51void __iomem *io_base = irq_data_get_irq_chip_data(d);52u32 mask = 1 << irq;5354clrbits32(io_base + FLIPPER_IMR, mask);55/* this is at least needed for RSW */56out_be32(io_base + FLIPPER_ICR, mask);57}5859static void flipper_pic_ack(struct irq_data *d)60{61int irq = irqd_to_hwirq(d);62void __iomem *io_base = irq_data_get_irq_chip_data(d);6364/* this is at least needed for RSW */65out_be32(io_base + FLIPPER_ICR, 1 << irq);66}6768static void flipper_pic_mask(struct irq_data *d)69{70int irq = irqd_to_hwirq(d);71void __iomem *io_base = irq_data_get_irq_chip_data(d);7273clrbits32(io_base + FLIPPER_IMR, 1 << irq);74}7576static void flipper_pic_unmask(struct irq_data *d)77{78int irq = irqd_to_hwirq(d);79void __iomem *io_base = irq_data_get_irq_chip_data(d);8081setbits32(io_base + FLIPPER_IMR, 1 << irq);82}838485static struct irq_chip flipper_pic = {86.name = "flipper-pic",87.irq_ack = flipper_pic_ack,88.irq_mask_ack = flipper_pic_mask_and_ack,89.irq_mask = flipper_pic_mask,90.irq_unmask = flipper_pic_unmask,91};9293/*94* IRQ host hooks.95*96*/9798static struct irq_host *flipper_irq_host;99100static int flipper_pic_map(struct irq_host *h, unsigned int virq,101irq_hw_number_t hwirq)102{103irq_set_chip_data(virq, h->host_data);104irq_set_status_flags(virq, IRQ_LEVEL);105irq_set_chip_and_handler(virq, &flipper_pic, handle_level_irq);106return 0;107}108109static int flipper_pic_match(struct irq_host *h, struct device_node *np)110{111return 1;112}113114115static struct irq_host_ops flipper_irq_host_ops = {116.map = flipper_pic_map,117.match = flipper_pic_match,118};119120/*121* Platform hooks.122*123*/124125static void __flipper_quiesce(void __iomem *io_base)126{127/* mask and ack all IRQs */128out_be32(io_base + FLIPPER_IMR, 0x00000000);129out_be32(io_base + FLIPPER_ICR, 0xffffffff);130}131132struct irq_host * __init flipper_pic_init(struct device_node *np)133{134struct device_node *pi;135struct irq_host *irq_host = NULL;136struct resource res;137void __iomem *io_base;138int retval;139140pi = of_get_parent(np);141if (!pi) {142pr_err("no parent found\n");143goto out;144}145if (!of_device_is_compatible(pi, "nintendo,flipper-pi")) {146pr_err("unexpected parent compatible\n");147goto out;148}149150retval = of_address_to_resource(pi, 0, &res);151if (retval) {152pr_err("no io memory range found\n");153goto out;154}155io_base = ioremap(res.start, resource_size(&res));156157pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base);158159__flipper_quiesce(io_base);160161irq_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, FLIPPER_NR_IRQS,162&flipper_irq_host_ops, -1);163if (!irq_host) {164pr_err("failed to allocate irq_host\n");165return NULL;166}167168irq_host->host_data = io_base;169170out:171return irq_host;172}173174unsigned int flipper_pic_get_irq(void)175{176void __iomem *io_base = flipper_irq_host->host_data;177int irq;178u32 irq_status;179180irq_status = in_be32(io_base + FLIPPER_ICR) &181in_be32(io_base + FLIPPER_IMR);182if (irq_status == 0)183return NO_IRQ; /* no more IRQs pending */184185irq = __ffs(irq_status);186return irq_linear_revmap(flipper_irq_host, irq);187}188189/*190* Probe function.191*192*/193194void __init flipper_pic_probe(void)195{196struct device_node *np;197198np = of_find_compatible_node(NULL, NULL, "nintendo,flipper-pic");199BUG_ON(!np);200201flipper_irq_host = flipper_pic_init(np);202BUG_ON(!flipper_irq_host);203204irq_set_default_host(flipper_irq_host);205206of_node_put(np);207}208209/*210* Misc functions related to the flipper chipset.211*212*/213214/**215* flipper_quiesce() - quiesce flipper irq controller216*217* Mask and ack all interrupt sources.218*219*/220void flipper_quiesce(void)221{222void __iomem *io_base = flipper_irq_host->host_data;223224__flipper_quiesce(io_base);225}226227/*228* Resets the platform.229*/230void flipper_platform_reset(void)231{232void __iomem *io_base;233234if (flipper_irq_host && flipper_irq_host->host_data) {235io_base = flipper_irq_host->host_data;236out_8(io_base + FLIPPER_RESET, 0x00);237}238}239240/*241* Returns non-zero if the reset button is pressed.242*/243int flipper_is_reset_button_pressed(void)244{245void __iomem *io_base;246u32 icr;247248if (flipper_irq_host && flipper_irq_host->host_data) {249io_base = flipper_irq_host->host_data;250icr = in_be32(io_base + FLIPPER_ICR);251return !(icr & FLIPPER_ICR_RSS);252}253return 0;254}255256257258