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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/powerpc/platforms/iseries/it_lp_naca.h
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/*

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 * Copyright (C) 2001  Mike Corrigan IBM Corporation

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 *

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 * This program is free software; you can redistribute it and/or modify

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 * it under the terms of the GNU General Public License as published by

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 * the Free Software Foundation; either version 2 of the License, or

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 * (at your option) any later version.

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 *

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 * This program is distributed in the hope that it will be useful,

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 * but WITHOUT ANY WARRANTY; without even the implied warranty of

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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

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 * GNU General Public License for more details.

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 *

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 * You should have received a copy of the GNU General Public License

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 * along with this program; if not, write to the Free Software

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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA

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 */

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#ifndef _PLATFORMS_ISERIES_IT_LP_NACA_H

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#define _PLATFORMS_ISERIES_IT_LP_NACA_H

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#include <linux/types.h>

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/*

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 *	This control block contains the data that is shared between the

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 *	hypervisor (PLIC) and the OS.

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 */

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struct ItLpNaca {

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// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data

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	u32	xDesc;			// Eye catcher			x00-x03

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	u16	xSize;			// Size of this class		x04-x05

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	u16	xIntHdlrOffset;		// Offset to IntHdlr array	x06-x07

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	u8	xMaxIntHdlrEntries;	// Number of entries in array	x08-x08

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	u8	xPrimaryLpIndex;	// LP Index of Primary		x09-x09

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	u8	xServiceLpIndex;	// LP Ind of Service Focal Pointx0A-x0A

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	u8	xLpIndex;		// LP Index			x0B-x0B

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	u16	xMaxLpQueues;		// Number of allocated queues	x0C-x0D

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	u16	xLpQueueOffset;		// Offset to start of LP queues	x0E-x0F

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	u8	xPirEnvironMode;	// Piranha or hardware		x10-x10

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	u8	xPirConsoleMode;	// Piranha console indicator	x11-x11

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	u8	xPirDasdMode;		// Piranha dasd indicator	x12-x12

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	u8	xRsvd1_0[5];		// Reserved for Piranha related	x13-x17

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	u8	flags;			// flags, see below		x18-x1F

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	u8	xSpVpdFormat;		// VPD areas are in CSP format	...

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	u8	xIntProcRatio;		// Ratio of int procs to procs	...

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	u8	xRsvd1_2[5];		// Reserved			...

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	u16	xRsvd1_3;		// Reserved			x20-x21

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	u16	xPlicVrmIndex;		// VRM index of PLIC		x22-x23

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	u16	xMinSupportedSlicVrmInd;// Min supported OS VRM index	x24-x25

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	u16	xMinCompatableSlicVrmInd;// Min compatible OS VRM index x26-x27

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	u64	xLoadAreaAddr;		// ER address of load area	x28-x2F

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	u32	xLoadAreaChunks;	// Chunks for the load area	x30-x33

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	u32	xPaseSysCallCRMask;	// Mask used to test CR before  x34-x37

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					// doing an ASR switch on PASE

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					// system call.

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	u64	xSlicSegmentTablePtr;	// Pointer to Slic seg table.   x38-x3f

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	u8	xRsvd1_4[64];		//				x40-x7F

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// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data

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	u8	xRsvd2_0[128];		// Reserved			x00-x7F

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// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators

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// NB: Padding required to keep xInterruptHdlr at x300 which is required

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// for v4r4 PLIC.

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	u8	xOldLpQueue[128];	// LP Queue needed for v4r4	100-17F

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	u8	xRsvd3_0[384];		// Reserved			180-2FF

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// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt

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//  handlers

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	u64	xInterruptHdlr[32];	// Interrupt handlers		300-x3FF

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};

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extern struct ItLpNaca		itLpNaca;

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#define ITLPNACA_LPAR		0x80	/* Is LPAR installed on the system */

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#define ITLPNACA_PARTITIONED	0x40	/* Is the system partitioned */

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#define ITLPNACA_HWSYNCEDTBS	0x20	/* Hardware synced TBs */

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#define ITLPNACA_HMTINT		0x10	/* Utilize MHT for interrupts */

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#endif /* _PLATFORMS_ISERIES_IT_LP_NACA_H */

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