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awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/powerpc/xmon/spu-dis.c
10818 views
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/* Disassemble SPU instructions
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Copyright 2006 Free Software Foundation, Inc.
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This file is part of GDB, GAS, and the GNU binutils.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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#include <linux/string.h>
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#include "nonstdio.h"
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#include "ansidecl.h"
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#include "spu.h"
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#include "dis-asm.h"
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/* This file provides a disassembler function which uses
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the disassembler interface defined in dis-asm.h. */
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extern const struct spu_opcode spu_opcodes[];
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extern const int spu_num_opcodes;
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#define SPU_DISASM_TBL_SIZE (1 << 11)
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static const struct spu_opcode *spu_disassemble_table[SPU_DISASM_TBL_SIZE];
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static void
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init_spu_disassemble (void)
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{
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int i;
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/* If two instructions have the same opcode then we prefer the first
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* one. In most cases it is just an alternate mnemonic. */
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for (i = 0; i < spu_num_opcodes; i++)
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{
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int o = spu_opcodes[i].opcode;
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if (o >= SPU_DISASM_TBL_SIZE)
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continue; /* abort (); */
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if (spu_disassemble_table[o] == 0)
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spu_disassemble_table[o] = &spu_opcodes[i];
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}
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}
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/* Determine the instruction from the 10 least significant bits. */
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static const struct spu_opcode *
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get_index_for_opcode (unsigned int insn)
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{
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const struct spu_opcode *index;
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unsigned int opcode = insn >> (32-11);
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/* Init the table. This assumes that element 0/opcode 0 (currently
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* NOP) is always used */
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if (spu_disassemble_table[0] == 0)
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init_spu_disassemble ();
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if ((index = spu_disassemble_table[opcode & 0x780]) != 0
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&& index->insn_type == RRR)
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return index;
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if ((index = spu_disassemble_table[opcode & 0x7f0]) != 0
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&& (index->insn_type == RI18 || index->insn_type == LBT))
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return index;
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if ((index = spu_disassemble_table[opcode & 0x7f8]) != 0
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&& index->insn_type == RI10)
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return index;
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if ((index = spu_disassemble_table[opcode & 0x7fc]) != 0
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&& (index->insn_type == RI16))
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return index;
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if ((index = spu_disassemble_table[opcode & 0x7fe]) != 0
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&& (index->insn_type == RI8))
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return index;
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if ((index = spu_disassemble_table[opcode & 0x7ff]) != 0)
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return index;
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return NULL;
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}
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/* Print a Spu instruction. */
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int
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print_insn_spu (unsigned long insn, unsigned long memaddr)
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{
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int value;
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int hex_value;
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const struct spu_opcode *index;
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enum spu_insns tag;
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index = get_index_for_opcode (insn);
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if (index == 0)
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{
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printf(".long 0x%x", insn);
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}
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else
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{
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int i;
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int paren = 0;
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tag = (enum spu_insns)(index - spu_opcodes);
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printf("%s", index->mnemonic);
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if (tag == M_BI || tag == M_BISL || tag == M_IRET || tag == M_BISLED
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|| tag == M_BIHNZ || tag == M_BIHZ || tag == M_BINZ || tag == M_BIZ
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|| tag == M_SYNC || tag == M_HBR)
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{
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int fb = (insn >> (32-18)) & 0x7f;
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if (fb & 0x40)
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printf(tag == M_SYNC ? "c" : "p");
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if (fb & 0x20)
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printf("d");
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if (fb & 0x10)
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printf("e");
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}
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if (index->arg[0] != 0)
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printf("\t");
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hex_value = 0;
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for (i = 1; i <= index->arg[0]; i++)
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{
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int arg = index->arg[i];
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if (arg != A_P && !paren && i > 1)
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printf(",");
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switch (arg)
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{
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case A_T:
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printf("$%d",
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DECODE_INSN_RT (insn));
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break;
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case A_A:
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printf("$%d",
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DECODE_INSN_RA (insn));
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break;
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case A_B:
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printf("$%d",
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DECODE_INSN_RB (insn));
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break;
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case A_C:
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printf("$%d",
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DECODE_INSN_RC (insn));
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break;
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case A_S:
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printf("$sp%d",
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DECODE_INSN_RA (insn));
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break;
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case A_H:
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printf("$ch%d",
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DECODE_INSN_RA (insn));
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break;
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case A_P:
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paren++;
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printf("(");
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break;
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case A_U7A:
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printf("%d",
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173 - DECODE_INSN_U8 (insn));
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break;
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case A_U7B:
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printf("%d",
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155 - DECODE_INSN_U8 (insn));
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break;
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case A_S3:
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case A_S6:
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case A_S7:
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case A_S7N:
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case A_U3:
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case A_U5:
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case A_U6:
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case A_U7:
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hex_value = DECODE_INSN_I7 (insn);
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printf("%d", hex_value);
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break;
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case A_S11:
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print_address(memaddr + DECODE_INSN_I9a (insn) * 4);
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break;
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case A_S11I:
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print_address(memaddr + DECODE_INSN_I9b (insn) * 4);
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break;
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case A_S10:
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case A_S10B:
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hex_value = DECODE_INSN_I10 (insn);
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printf("%d", hex_value);
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break;
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case A_S14:
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hex_value = DECODE_INSN_I10 (insn) * 16;
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printf("%d", hex_value);
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break;
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case A_S16:
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hex_value = DECODE_INSN_I16 (insn);
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printf("%d", hex_value);
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break;
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case A_X16:
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hex_value = DECODE_INSN_U16 (insn);
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printf("%u", hex_value);
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break;
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case A_R18:
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value = DECODE_INSN_I16 (insn) * 4;
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if (value == 0)
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printf("%d", value);
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else
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{
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hex_value = memaddr + value;
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print_address(hex_value & 0x3ffff);
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}
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break;
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case A_S18:
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value = DECODE_INSN_U16 (insn) * 4;
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if (value == 0)
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printf("%d", value);
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else
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print_address(value);
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break;
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case A_U18:
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value = DECODE_INSN_U18 (insn);
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if (value == 0 || 1)
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{
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hex_value = value;
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printf("%u", value);
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}
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else
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print_address(value);
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break;
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case A_U14:
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hex_value = DECODE_INSN_U14 (insn);
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printf("%u", hex_value);
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break;
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}
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if (arg != A_P && paren)
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{
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printf(")");
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paren--;
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}
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}
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if (hex_value > 16)
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printf("\t# %x", hex_value);
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}
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return 4;
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}
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