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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/score/mm/tlb-miss.S
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/*

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 * arch/score/mm/tlbex.S

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 *

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 * Score Processor version.

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 *

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 * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.

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 *  Lennox Wu <[email protected]>

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 *  Chen Liqin <[email protected]>

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 *

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 * This program is free software; you can redistribute it and/or modify

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 * it under the terms of the GNU General Public License as published by

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 * the Free Software Foundation; either version 2 of the License, or

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 * (at your option) any later version.

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 *

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 * This program is distributed in the hope that it will be useful,

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 * but WITHOUT ANY WARRANTY; without even the implied warranty of

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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

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 * GNU General Public License for more details.

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 *

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 * You should have received a copy of the GNU General Public License

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 * along with this program; if not, see the file COPYING, or write

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 * to the Free Software Foundation, Inc.,

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 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA

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 */

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#include <asm/asmmacro.h>

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#include <asm/pgtable-bits.h>

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#include <asm/scoreregs.h>

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/*

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* After this macro runs, the pte faulted on is

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* in register PTE, a ptr into the table in which

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* the pte belongs is in PTR.

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*/

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	.macro	load_pte, pte, ptr

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	la	\ptr, pgd_current

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	lw	\ptr, [\ptr, 0]

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	mfcr	\pte, cr6

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	srli	\pte, \pte, 22

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	slli	\pte, \pte, 2

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	add	\ptr, \ptr, \pte

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	lw	\ptr, [\ptr, 0]

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	mfcr	\pte, cr6

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	srli	\pte, \pte, 10

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	andi	\pte, 0xffc

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	add	\ptr, \ptr, \pte

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	lw	\pte, [\ptr, 0]

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	.endm

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	.macro	pte_reload, ptr

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	lw	\ptr, [\ptr, 0]

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	mtcr	\ptr, cr12

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	nop

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	nop

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	nop

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	nop

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	nop

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	.endm

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	.macro do_fault, write

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	SAVE_ALL

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	mfcr	r6, cr6

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	mv	r4, r0

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	ldi	r5, \write

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	la	r8, do_page_fault

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	brl	r8

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	j	ret_from_exception

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	.endm

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	.macro	pte_writable, pte, ptr, label

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	andi	\pte, 0x280

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	cmpi.c	\pte, 0x280

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	bne	\label

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	lw	\pte, [\ptr, 0]		/*reload PTE*/

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	.endm

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/*

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 * Make PTE writable, update software status bits as well,

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 * then store at PTR.

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 */

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	.macro	pte_makewrite, pte, ptr

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	ori	\pte, 0x426

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	sw	\pte, [\ptr, 0]

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	.endm

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	.text

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ENTRY(score7_FTLB_refill_Handler)

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	la	r31, pgd_current	/* get pgd pointer */

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	lw	r31, [r31, 0]		/* get the address of PGD */

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	mfcr	r30, cr6

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	srli	r30, r30, 22		/* PGDIR_SHIFT = 22*/

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	slli	r30, r30, 2

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	add	r31, r31, r30

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	lw	r31, [r31, 0]		/* get the address of the start address of PTE table */

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	mfcr	r30, cr9

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	andi	r30, 0xfff 		/* equivalent to get PET index and right shift 2 bits */

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	add	r31, r31, r30

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	lw	r30, [r31, 0]		/* load pte entry */

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	mtcr	r30, cr12

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	nop

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	nop

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	nop

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	nop

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	nop

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	mtrtlb

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	nop

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	nop

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	nop

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	nop

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	nop

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	rte				/* 6 cycles to make sure tlb entry works */

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ENTRY(score7_KSEG_refill_Handler)

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	la	r31, pgd_current	/* get pgd pointer */

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	lw	r31, [r31, 0]		/* get the address of PGD */

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	mfcr	r30, cr6

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	srli	r30, r30, 22		/* PGDIR_SHIFT = 22 */

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	slli	r30, r30, 2

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	add	r31, r31, r30

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	lw	r31, [r31, 0]		/* get the address of the start address of PTE table */

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	mfcr	r30, cr6		/* get Bad VPN */

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	srli	r30, r30, 10

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	andi	r30, 0xffc		/* PTE VPN mask (bit 11~2) */

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	add	r31, r31, r30

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	lw	r30, [r31, 0]		/* load pte entry */

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	mtcr	r30, cr12

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	nop

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	nop

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	nop

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	nop

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	nop

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	mtrtlb

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	nop

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	nop

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	nop

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	nop

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	nop

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	rte				/* 6 cycles to make sure tlb entry works */

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nopage_tlbl:

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	do_fault	0		/* Read */

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ENTRY(handle_tlb_refill)

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	load_pte	r30, r31

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	pte_writable	r30, r31, handle_tlb_refill_nopage

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	pte_makewrite	r30, r31	/* Access|Modify|Dirty|Valid */

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	pte_reload	r31

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	mtrtlb

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	nop

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	nop

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	nop

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	nop

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	nop

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	rte

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handle_tlb_refill_nopage:

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	do_fault	0		/* Read */

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ENTRY(handle_tlb_invaild)

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	load_pte	r30, r31

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	stlb				/* find faulting entry */

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	pte_writable	r30, r31, handle_tlb_invaild_nopage

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	pte_makewrite	r30, r31	/* Access|Modify|Dirty|Valid */

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	pte_reload	r31

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	mtptlb

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	nop

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	nop

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	nop

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	nop

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	nop

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	rte

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handle_tlb_invaild_nopage:

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	do_fault	0		/* Read */

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ENTRY(handle_mod)

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	load_pte	r30, r31

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	stlb				/* find faulting entry */

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	andi	r30, _PAGE_WRITE	/* Writable? */

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	cmpz.c	r30

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	beq	nowrite_mod

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	lw	r30, [r31, 0]		/* reload into r30 */

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	/* Present and writable bits set, set accessed and dirty bits. */

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	pte_makewrite	r30, r31

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	/* Now reload the entry into the tlb. */

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	pte_reload	r31

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	mtptlb

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	nop

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	nop

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	nop

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	nop

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	nop

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	rte

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nowrite_mod:

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	do_fault	1	/* Write */

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