Path: blob/master/arch/sh/boards/mach-microdev/io.c
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/*1* linux/arch/sh/boards/superh/microdev/io.c2*3* Copyright (C) 2003 Sean McGoogan ([email protected])4* Copyright (C) 2003, 2004 SuperH, Inc.5* Copyright (C) 2004 Paul Mundt6*7* SuperH SH4-202 MicroDev board support.8*9* May be copied or modified under the terms of the GNU General Public10* License. See linux/COPYING for more information.11*/1213#include <linux/init.h>14#include <linux/pci.h>15#include <linux/wait.h>16#include <asm/io.h>17#include <mach/microdev.h>1819/*20* we need to have a 'safe' address to re-direct all I/O requests21* that we do not explicitly wish to handle. This safe address22* must have the following properies:23*24* * writes are ignored (no exception)25* * reads are benign (no side-effects)26* * accesses of width 1, 2 and 4-bytes are all valid.27*28* The Processor Version Register (PVR) has these properties.29*/30#define PVR 0xff000030 /* Processor Version Register */313233#define IO_IDE2_BASE 0x170ul /* I/O base for SMSC FDC37C93xAPM IDE #2 */34#define IO_IDE1_BASE 0x1f0ul /* I/O base for SMSC FDC37C93xAPM IDE #1 */35#define IO_ISP1161_BASE 0x290ul /* I/O port for Philips ISP1161x USB chip */36#define IO_SERIAL2_BASE 0x2f8ul /* I/O base for SMSC FDC37C93xAPM Serial #2 */37#define IO_LAN91C111_BASE 0x300ul /* I/O base for SMSC LAN91C111 Ethernet chip */38#define IO_IDE2_MISC 0x376ul /* I/O misc for SMSC FDC37C93xAPM IDE #2 */39#define IO_SUPERIO_BASE 0x3f0ul /* I/O base for SMSC FDC37C93xAPM SuperIO chip */40#define IO_IDE1_MISC 0x3f6ul /* I/O misc for SMSC FDC37C93xAPM IDE #1 */41#define IO_SERIAL1_BASE 0x3f8ul /* I/O base for SMSC FDC37C93xAPM Serial #1 */4243#define IO_ISP1161_EXTENT 0x04ul /* I/O extent for Philips ISP1161x USB chip */44#define IO_LAN91C111_EXTENT 0x10ul /* I/O extent for SMSC LAN91C111 Ethernet chip */45#define IO_SUPERIO_EXTENT 0x02ul /* I/O extent for SMSC FDC37C93xAPM SuperIO chip */46#define IO_IDE_EXTENT 0x08ul /* I/O extent for IDE Task Register set */47#define IO_SERIAL_EXTENT 0x10ul4849#define IO_LAN91C111_PHYS 0xa7500000ul /* Physical address of SMSC LAN91C111 Ethernet chip */50#define IO_ISP1161_PHYS 0xa7700000ul /* Physical address of Philips ISP1161x USB chip */51#define IO_SUPERIO_PHYS 0xa7800000ul /* Physical address of SMSC FDC37C93xAPM SuperIO chip */5253/*54* map I/O ports to memory-mapped addresses55*/56void __iomem *microdev_ioport_map(unsigned long offset, unsigned int len)57{58unsigned long result;5960if ((offset >= IO_LAN91C111_BASE) &&61(offset < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) {62/*63* SMSC LAN91C111 Ethernet chip64*/65result = IO_LAN91C111_PHYS + offset - IO_LAN91C111_BASE;66} else if ((offset >= IO_SUPERIO_BASE) &&67(offset < IO_SUPERIO_BASE + IO_SUPERIO_EXTENT)) {68/*69* SMSC FDC37C93xAPM SuperIO chip70*71* Configuration Registers72*/73result = IO_SUPERIO_PHYS + (offset << 1);74} else if (((offset >= IO_IDE1_BASE) &&75(offset < IO_IDE1_BASE + IO_IDE_EXTENT)) ||76(offset == IO_IDE1_MISC)) {77/*78* SMSC FDC37C93xAPM SuperIO chip79*80* IDE #181*/82result = IO_SUPERIO_PHYS + (offset << 1);83} else if (((offset >= IO_IDE2_BASE) &&84(offset < IO_IDE2_BASE + IO_IDE_EXTENT)) ||85(offset == IO_IDE2_MISC)) {86/*87* SMSC FDC37C93xAPM SuperIO chip88*89* IDE #290*/91result = IO_SUPERIO_PHYS + (offset << 1);92} else if ((offset >= IO_SERIAL1_BASE) &&93(offset < IO_SERIAL1_BASE + IO_SERIAL_EXTENT)) {94/*95* SMSC FDC37C93xAPM SuperIO chip96*97* Serial #198*/99result = IO_SUPERIO_PHYS + (offset << 1);100} else if ((offset >= IO_SERIAL2_BASE) &&101(offset < IO_SERIAL2_BASE + IO_SERIAL_EXTENT)) {102/*103* SMSC FDC37C93xAPM SuperIO chip104*105* Serial #2106*/107result = IO_SUPERIO_PHYS + (offset << 1);108} else if ((offset >= IO_ISP1161_BASE) &&109(offset < IO_ISP1161_BASE + IO_ISP1161_EXTENT)) {110/*111* Philips USB ISP1161x chip112*/113result = IO_ISP1161_PHYS + offset - IO_ISP1161_BASE;114} else {115/*116* safe default.117*/118printk("Warning: unexpected port in %s( offset = 0x%lx )\n",119__func__, offset);120result = PVR;121}122123return (void __iomem *)result;124}125126127