Path: blob/master/arch/sh/boards/mach-se/770x/irq.c
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/*1* linux/arch/sh/boards/se/770x/irq.c2*3* Copyright (C) 2000 Kazumoto Kojima4* Copyright (C) 2006 Nobuhiro Iwamatsu5*6* Hitachi SolutionEngine Support.7*8*/910#include <linux/init.h>11#include <linux/interrupt.h>12#include <linux/irq.h>13#include <asm/irq.h>14#include <asm/io.h>15#include <mach-se/mach/se.h>1617static struct ipr_data ipr_irq_table[] = {18/*19* Super I/O (Just mimic PC):20* 1: keyboard21* 3: serial 022* 4: serial 123* 5: printer24* 6: floppy25* 8: rtc26* 12: mouse27* 14: ide028*/29#if defined(CONFIG_CPU_SUBTYPE_SH7705)30/* This is default value */31{ 13, 0, 8, 0x0f-13, },32{ 5 , 0, 4, 0x0f- 5, },33{ 10, 1, 0, 0x0f-10, },34{ 7 , 2, 4, 0x0f- 7, },35{ 3 , 2, 0, 0x0f- 3, },36{ 1 , 3, 12, 0x0f- 1, },37{ 12, 3, 4, 0x0f-12, }, /* LAN */38{ 2 , 4, 8, 0x0f- 2, }, /* PCIRQ2 */39{ 6 , 4, 4, 0x0f- 6, }, /* PCIRQ1 */40{ 14, 4, 0, 0x0f-14, }, /* PCIRQ0 */41{ 0 , 5, 12, 0x0f , },42{ 4 , 5, 4, 0x0f- 4, },43{ 8 , 6, 12, 0x0f- 8, },44{ 9 , 6, 8, 0x0f- 9, },45{ 11, 6, 4, 0x0f-11, },46#else47{ 14, 0, 8, 0x0f-14, },48{ 12, 0, 4, 0x0f-12, },49{ 8, 1, 4, 0x0f- 8, },50{ 6, 2, 12, 0x0f- 6, },51{ 5, 2, 8, 0x0f- 5, },52{ 4, 2, 4, 0x0f- 4, },53{ 3, 2, 0, 0x0f- 3, },54{ 1, 3, 12, 0x0f- 1, },55#if defined(CONFIG_STNIC)56/* ST NIC */57{ 10, 3, 4, 0x0f-10, }, /* LAN */58#endif59/* MRSHPC IRQs setting */60{ 0, 4, 12, 0x0f- 0, }, /* PCIRQ3 */61{ 11, 4, 8, 0x0f-11, }, /* PCIRQ2 */62{ 9, 4, 4, 0x0f- 9, }, /* PCIRQ1 */63{ 7, 4, 0, 0x0f- 7, }, /* PCIRQ0 */64/* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */65/* NOTE: #2 and #13 are not used on PC */66{ 13, 6, 4, 0x0f-13, }, /* SLOTIRQ2 */67{ 2, 6, 0, 0x0f- 2, }, /* SLOTIRQ1 */68#endif69};7071static unsigned long ipr_offsets[] = {72BCR_ILCRA,73BCR_ILCRB,74BCR_ILCRC,75BCR_ILCRD,76BCR_ILCRE,77BCR_ILCRF,78BCR_ILCRG,79};8081static struct ipr_desc ipr_irq_desc = {82.ipr_offsets = ipr_offsets,83.nr_offsets = ARRAY_SIZE(ipr_offsets),8485.ipr_data = ipr_irq_table,86.nr_irqs = ARRAY_SIZE(ipr_irq_table),87.chip = {88.name = "IPR-se770x",89},90};9192/*93* Initialize IRQ setting94*/95void __init init_se_IRQ(void)96{97/* Disable all interrupts */98__raw_writew(0, BCR_ILCRA);99__raw_writew(0, BCR_ILCRB);100__raw_writew(0, BCR_ILCRC);101__raw_writew(0, BCR_ILCRD);102__raw_writew(0, BCR_ILCRE);103__raw_writew(0, BCR_ILCRF);104__raw_writew(0, BCR_ILCRG);105106register_ipr_controller(&ipr_irq_desc);107}108109110