Path: blob/master/arch/sh/boards/mach-se/7780/irq.c
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/*1* linux/arch/sh/boards/se/7780/irq.c2*3* Copyright (C) 2006,2007 Nobuhiro Iwamatsu4*5* Hitachi UL SolutionEngine 7780 Support.6*7* This file is subject to the terms and conditions of the GNU General Public8* License. See the file "COPYING" in the main directory of this archive9* for more details.10*/11#include <linux/init.h>12#include <linux/irq.h>13#include <linux/interrupt.h>14#include <linux/io.h>15#include <mach-se/mach/se7780.h>1617#define INTC_BASE 0xffd0000018#define INTC_ICR1 (INTC_BASE+0x1c)1920/*21* Initialize IRQ setting22*/23void __init init_se7780_IRQ(void)24{25/* enable all interrupt at FPGA */26__raw_writew(0, FPGA_INTMSK1);27/* mask SM501 interrupt */28__raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);29/* enable all interrupt at FPGA */30__raw_writew(0, FPGA_INTMSK2);3132/* set FPGA INTSEL register */33/* FPGA + 0x06 */34__raw_writew( ((IRQPIN_SM501 << IRQPOS_SM501) |35(IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1);3637/* FPGA + 0x08 */38__raw_writew(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |39(IRQPIN_EXTINT3 << IRQPOS_EXTINT3) |40(IRQPIN_EXTINT2 << IRQPOS_EXTINT2) |41(IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2);4243/* FPGA + 0x0A */44__raw_writew((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);4546plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */4748/* ICR1: detect low level(for 2ndcut) */49__raw_writel(0xAAAA0000, INTC_ICR1);5051/*52* FPGA PCISEL register initialize53*54* CPU || SLOT1 | SLOT2 | S-ATA | USB55* -------------------------------------56* INTA || INTA | INTD | -- | INTB57* -------------------------------------58* INTB || INTB | INTA | -- | INTC59* -------------------------------------60* INTC || INTC | INTB | INTA | --61* -------------------------------------62* INTD || INTD | INTC | -- | INTA63* -------------------------------------64*/65__raw_writew(0x0013, FPGA_PCI_INTSEL1);66__raw_writew(0xE402, FPGA_PCI_INTSEL2);67}686970