Path: blob/master/arch/sh/cchips/hd6446x/hd64461.c
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/*1* Copyright (C) 2000 YAEGASHI Takeshi2* Hitachi HD64461 companion chip support3*/45#include <linux/sched.h>6#include <linux/module.h>7#include <linux/kernel.h>8#include <linux/param.h>9#include <linux/interrupt.h>10#include <linux/init.h>11#include <linux/irq.h>12#include <linux/io.h>13#include <asm/irq.h>14#include <asm/hd64461.h>1516/* This belongs in cpu specific */17#define INTC_ICR1 0xA4140010UL1819static void hd64461_mask_irq(struct irq_data *data)20{21unsigned int irq = data->irq;22unsigned short nimr;23unsigned short mask = 1 << (irq - HD64461_IRQBASE);2425nimr = __raw_readw(HD64461_NIMR);26nimr |= mask;27__raw_writew(nimr, HD64461_NIMR);28}2930static void hd64461_unmask_irq(struct irq_data *data)31{32unsigned int irq = data->irq;33unsigned short nimr;34unsigned short mask = 1 << (irq - HD64461_IRQBASE);3536nimr = __raw_readw(HD64461_NIMR);37nimr &= ~mask;38__raw_writew(nimr, HD64461_NIMR);39}4041static void hd64461_mask_and_ack_irq(struct irq_data *data)42{43hd64461_mask_irq(data);4445#ifdef CONFIG_HD64461_ENABLER46if (data->irq == HD64461_IRQBASE + 13)47__raw_writeb(0x00, HD64461_PCC1CSCR);48#endif49}5051static struct irq_chip hd64461_irq_chip = {52.name = "HD64461-IRQ",53.irq_mask = hd64461_mask_irq,54.irq_mask_ack = hd64461_mask_and_ack_irq,55.irq_unmask = hd64461_unmask_irq,56};5758static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)59{60unsigned short intv = __raw_readw(HD64461_NIRR);61unsigned int ext_irq = HD64461_IRQBASE;6263intv &= (1 << HD64461_IRQ_NUM) - 1;6465for (; intv; intv >>= 1, ext_irq++) {66if (!(intv & 1))67continue;6869generic_handle_irq(ext_irq);70}71}7273int __init setup_hd64461(void)74{75int i, nid = cpu_to_node(boot_cpu_data);7677if (!MACH_HD64461)78return 0;7980printk(KERN_INFO81"HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",82HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,83HD64461_IRQBASE + 15);8485/* Should be at processor specific part.. */86#if defined(CONFIG_CPU_SUBTYPE_SH7709)87__raw_writew(0x2240, INTC_ICR1);88#endif89__raw_writew(0xffff, HD64461_NIMR);9091/* IRQ 80 -> 95 belongs to HD64461 */92for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) {93unsigned int irq;9495irq = create_irq_nr(i, nid);96if (unlikely(irq == 0)) {97pr_err("%s: failed hooking irq %d for HD64461\n",98__func__, i);99return -EBUSY;100}101102if (unlikely(irq != i)) {103pr_err("%s: got irq %d but wanted %d, bailing.\n",104__func__, irq, i);105destroy_irq(irq);106return -EINVAL;107}108109irq_set_chip_and_handler(i, &hd64461_irq_chip,110handle_level_irq);111}112113irq_set_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);114irq_set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);115116#ifdef CONFIG_HD64461_ENABLER117printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");118__raw_writeb(0x4c, HD64461_PCC1CSCIER);119__raw_writeb(0x00, HD64461_PCC1CSCR);120#endif121122return 0;123}124125module_init(setup_hd64461);126127128