Path: blob/master/arch/sh/include/asm/bitops-llsc.h
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#ifndef __ASM_SH_BITOPS_LLSC_H1#define __ASM_SH_BITOPS_LLSC_H23static inline void set_bit(int nr, volatile void *addr)4{5int mask;6volatile unsigned int *a = addr;7unsigned long tmp;89a += nr >> 5;10mask = 1 << (nr & 0x1f);1112__asm__ __volatile__ (13"1: \n\t"14"movli.l @%1, %0 ! set_bit \n\t"15"or %2, %0 \n\t"16"movco.l %0, @%1 \n\t"17"bf 1b \n\t"18: "=&z" (tmp)19: "r" (a), "r" (mask)20: "t", "memory"21);22}2324static inline void clear_bit(int nr, volatile void *addr)25{26int mask;27volatile unsigned int *a = addr;28unsigned long tmp;2930a += nr >> 5;31mask = 1 << (nr & 0x1f);3233__asm__ __volatile__ (34"1: \n\t"35"movli.l @%1, %0 ! clear_bit \n\t"36"and %2, %0 \n\t"37"movco.l %0, @%1 \n\t"38"bf 1b \n\t"39: "=&z" (tmp)40: "r" (a), "r" (~mask)41: "t", "memory"42);43}4445static inline void change_bit(int nr, volatile void *addr)46{47int mask;48volatile unsigned int *a = addr;49unsigned long tmp;5051a += nr >> 5;52mask = 1 << (nr & 0x1f);5354__asm__ __volatile__ (55"1: \n\t"56"movli.l @%1, %0 ! change_bit \n\t"57"xor %2, %0 \n\t"58"movco.l %0, @%1 \n\t"59"bf 1b \n\t"60: "=&z" (tmp)61: "r" (a), "r" (mask)62: "t", "memory"63);64}6566static inline int test_and_set_bit(int nr, volatile void *addr)67{68int mask, retval;69volatile unsigned int *a = addr;70unsigned long tmp;7172a += nr >> 5;73mask = 1 << (nr & 0x1f);7475__asm__ __volatile__ (76"1: \n\t"77"movli.l @%2, %0 ! test_and_set_bit \n\t"78"mov %0, %1 \n\t"79"or %3, %0 \n\t"80"movco.l %0, @%2 \n\t"81"bf 1b \n\t"82"and %3, %1 \n\t"83: "=&z" (tmp), "=&r" (retval)84: "r" (a), "r" (mask)85: "t", "memory"86);8788return retval != 0;89}9091static inline int test_and_clear_bit(int nr, volatile void *addr)92{93int mask, retval;94volatile unsigned int *a = addr;95unsigned long tmp;9697a += nr >> 5;98mask = 1 << (nr & 0x1f);99100__asm__ __volatile__ (101"1: \n\t"102"movli.l @%2, %0 ! test_and_clear_bit \n\t"103"mov %0, %1 \n\t"104"and %4, %0 \n\t"105"movco.l %0, @%2 \n\t"106"bf 1b \n\t"107"and %3, %1 \n\t"108"synco \n\t"109: "=&z" (tmp), "=&r" (retval)110: "r" (a), "r" (mask), "r" (~mask)111: "t", "memory"112);113114return retval != 0;115}116117static inline int test_and_change_bit(int nr, volatile void *addr)118{119int mask, retval;120volatile unsigned int *a = addr;121unsigned long tmp;122123a += nr >> 5;124mask = 1 << (nr & 0x1f);125126__asm__ __volatile__ (127"1: \n\t"128"movli.l @%2, %0 ! test_and_change_bit \n\t"129"mov %0, %1 \n\t"130"xor %3, %0 \n\t"131"movco.l %0, @%2 \n\t"132"bf 1b \n\t"133"and %3, %1 \n\t"134"synco \n\t"135: "=&z" (tmp), "=&r" (retval)136: "r" (a), "r" (mask)137: "t", "memory"138);139140return retval != 0;141}142143#include <asm-generic/bitops/non-atomic.h>144145#endif /* __ASM_SH_BITOPS_LLSC_H */146147148