Path: blob/master/arch/sh/include/cpu-sh4/cpu/sq.h
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/*1* include/asm-sh/cpu-sh4/sq.h2*3* Copyright (C) 2001, 2002, 2003 Paul Mundt4* Copyright (C) 2001, 2002 M. R. Brown5*6* This file is subject to the terms and conditions of the GNU General Public7* License. See the file "COPYING" in the main directory of this archive8* for more details.9*/10#ifndef __ASM_CPU_SH4_SQ_H11#define __ASM_CPU_SH4_SQ_H1213#include <asm/addrspace.h>14#include <asm/page.h>1516/*17* Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be18* mapped to any physical address space. Since data is written (and aligned)19* to 32-byte boundaries, we need to be sure that all allocations are aligned.20*/21#define SQ_SIZE 3222#define SQ_ALIGN_MASK (~(SQ_SIZE - 1))23#define SQ_ALIGN(addr) (((addr)+SQ_SIZE-1) & SQ_ALIGN_MASK)2425#define SQ_QACR0 (P4SEG_REG_BASE + 0x38)26#define SQ_QACR1 (P4SEG_REG_BASE + 0x3c)27#define SQ_ADDRMAX (P4SEG_STORE_QUE + 0x04000000)2829/* arch/sh/kernel/cpu/sh4/sq.c */30unsigned long sq_remap(unsigned long phys, unsigned int size,31const char *name, pgprot_t prot);32void sq_unmap(unsigned long vaddr);33void sq_flush_range(unsigned long start, unsigned int len);3435#endif /* __ASM_CPU_SH4_SQ_H */363738