Path: blob/master/arch/sh/include/cpu-sh4/cpu/watchdog.h
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/*1* include/asm-sh/cpu-sh4/watchdog.h2*3* Copyright (C) 2002, 2003 Paul Mundt4* Copyright (C) 2009 Siemens AG5* Copyright (C) 2009 Sitdikov Valentin6*7* This file is subject to the terms and conditions of the GNU General Public8* License. See the file "COPYING" in the main directory of this archive9* for more details.10*/11#ifndef __ASM_CPU_SH4_WATCHDOG_H12#define __ASM_CPU_SH4_WATCHDOG_H1314#if defined(CONFIG_CPU_SUBTYPE_SH7785) || defined(CONFIG_CPU_SUBTYPE_SH7780)15/* Prefix definition */16#define WTBST_HIGH 0x5517/* Register definitions */18#define WTCNT_R 0xffcc0010 /*WDTCNT*/19#define WTCSR 0xffcc0004 /*WDTCSR*/20#define WTCNT 0xffcc0000 /*WDTST*/21#define WTST WTCNT22#define WTBST 0xffcc0008 /*WDTBST*/23/* Register definitions */24#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \25defined(CONFIG_CPU_SUBTYPE_SH7723) || \26defined(CONFIG_CPU_SUBTYPE_SH7724)27#define WTCNT 0xa452000028#define WTCSR 0xa452000429#else30/* Register definitions */31#define WTCNT 0xffc0000832#define WTCSR 0xffc0000c33#endif3435/* Bit definitions */36#define WTCSR_TME 0x8037#define WTCSR_WT 0x4038#define WTCSR_RSTS 0x2039#define WTCSR_WOVF 0x1040#define WTCSR_IOVF 0x084142#endif /* __ASM_CPU_SH4_WATCHDOG_H */43444546