Path: blob/master/arch/sh/include/mach-common/mach/microdev.h
15162 views
/*1* linux/include/asm-sh/microdev.h2*3* Copyright (C) 2003 Sean McGoogan ([email protected])4*5* Definitions for the SuperH SH4-202 MicroDev board.6*7* May be copied or modified under the terms of the GNU General Public8* License. See linux/COPYING for more information.9*/10#ifndef __ASM_SH_MICRODEV_H11#define __ASM_SH_MICRODEV_H1213extern void init_microdev_irq(void);14extern void microdev_print_fpga_intc_status(void);1516/*17* The following are useful macros for manipulating the interrupt18* controller (INTC) on the CPU-board FPGA. should be noted that there19* is an INTC on the FPGA, and a separate INTC on the SH4-202 core -20* these are two different things, both of which need to be prorammed to21* correctly route - unfortunately, they have the same name and22* abbreviations!23*/24#define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */25#define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */26#define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */27#define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interrupt mask to enable/disable INTC in CPU-board FPGA */28#define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */29#define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */30#define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */31#define MICRODEV_FPGA_INTSRC_REG (MICRODEV_FPGA_INTC_BASE+0x30ul) /* Interrupt Source Register on INTC on CPU-board FPGA */32#define MICRODEV_FPGA_INTREQ_REG (MICRODEV_FPGA_INTC_BASE+0x38ul) /* Interrupt Request Register on INTC on CPU-board FPGA */333435/*36* The following are the IRQ numbers for the Linux Kernel for external37* interrupts. i.e. the numbers seen by 'cat /proc/interrupt'.38*/39#define MICRODEV_LINUX_IRQ_KEYBOARD 1 /* SuperIO Keyboard */40#define MICRODEV_LINUX_IRQ_SERIAL1 2 /* SuperIO Serial #1 */41#define MICRODEV_LINUX_IRQ_ETHERNET 3 /* on-board Ethnernet */42#define MICRODEV_LINUX_IRQ_SERIAL2 4 /* SuperIO Serial #2 */43#define MICRODEV_LINUX_IRQ_USB_HC 7 /* on-board USB HC */44#define MICRODEV_LINUX_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */45#define MICRODEV_LINUX_IRQ_IDE2 13 /* SuperIO IDE #2 */46#define MICRODEV_LINUX_IRQ_IDE1 14 /* SuperIO IDE #1 */4748/*49* The following are the IRQ numbers for the INTC on the FPGA for50* external interrupts. i.e. the bits in the INTC registers in the51* FPGA.52*/53#define MICRODEV_FPGA_IRQ_KEYBOARD 1 /* SuperIO Keyboard */54#define MICRODEV_FPGA_IRQ_SERIAL1 3 /* SuperIO Serial #1 */55#define MICRODEV_FPGA_IRQ_SERIAL2 4 /* SuperIO Serial #2 */56#define MICRODEV_FPGA_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */57#define MICRODEV_FPGA_IRQ_IDE1 14 /* SuperIO IDE #1 */58#define MICRODEV_FPGA_IRQ_IDE2 15 /* SuperIO IDE #2 */59#define MICRODEV_FPGA_IRQ_USB_HC 16 /* on-board USB HC */60#define MICRODEV_FPGA_IRQ_ETHERNET 18 /* on-board Ethnernet */6162#define MICRODEV_IRQ_PCI_INTA 863#define MICRODEV_IRQ_PCI_INTB 964#define MICRODEV_IRQ_PCI_INTC 1065#define MICRODEV_IRQ_PCI_INTD 116667#define __IO_PREFIX microdev68#include <asm/io_generic.h>6970#endif /* __ASM_SH_MICRODEV_H */717273