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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/sh/include/mach-se/mach/se7721.h
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/*

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 * Copyright (C) 2008 Renesas Solutions Corp.

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 *

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 * Hitachi UL SolutionEngine 7721 Support.

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 *

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 * This file is subject to the terms and conditions of the GNU General Public

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 * License.  See the file "COPYING" in the main directory of this archive

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 * for more details.

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 *

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 */

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#ifndef __ASM_SH_SE7721_H

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#define __ASM_SH_SE7721_H

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#include <asm/addrspace.h>

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/* Box specific addresses. */

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#define SE_AREA0_WIDTH	2		/* Area0: 32bit */

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#define PA_ROM		0xa0000000	/* EPROM */

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#define PA_ROM_SIZE	0x00200000	/* EPROM size 2M byte */

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#define PA_FROM		0xa1000000	/* Flash-ROM */

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#define PA_FROM_SIZE	0x01000000	/* Flash-ROM size 16M byte */

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#define PA_EXT1		0xa4000000

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#define PA_EXT1_SIZE	0x04000000

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#define PA_SDRAM	0xaC000000	/* SDRAM(Area3) 64MB */

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#define PA_SDRAM_SIZE	0x04000000

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#define PA_EXT4		0xb0000000

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#define PA_EXT4_SIZE	0x04000000

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#define PA_PERIPHERAL	0xB8000000

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#define PA_PCIC		PA_PERIPHERAL

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#define PA_MRSHPC	(PA_PERIPHERAL + 0x003fffe0)

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#define PA_MRSHPC_MW1	(PA_PERIPHERAL + 0x00400000)

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#define PA_MRSHPC_MW2	(PA_PERIPHERAL + 0x00500000)

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#define PA_MRSHPC_IO	(PA_PERIPHERAL + 0x00600000)

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#define MRSHPC_OPTION	(PA_MRSHPC + 6)

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#define MRSHPC_CSR	(PA_MRSHPC + 8)

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#define MRSHPC_ISR	(PA_MRSHPC + 10)

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#define MRSHPC_ICR	(PA_MRSHPC + 12)

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#define MRSHPC_CPWCR	(PA_MRSHPC + 14)

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#define MRSHPC_MW0CR1	(PA_MRSHPC + 16)

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#define MRSHPC_MW1CR1	(PA_MRSHPC + 18)

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#define MRSHPC_IOWCR1	(PA_MRSHPC + 20)

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#define MRSHPC_MW0CR2	(PA_MRSHPC + 22)

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#define MRSHPC_MW1CR2	(PA_MRSHPC + 24)

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#define MRSHPC_IOWCR2	(PA_MRSHPC + 26)

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#define MRSHPC_CDCR	(PA_MRSHPC + 28)

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#define MRSHPC_PCIC_INFO	(PA_MRSHPC + 30)

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#define PA_LED		0xB6800000	/* 8bit LED */

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#define PA_FPGA		0xB7000000 	/* FPGA base address */

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#define MRSHPC_IRQ0	10

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#define FPGA_ILSR1	(PA_FPGA + 0x02)

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#define FPGA_ILSR2	(PA_FPGA + 0x03)

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#define FPGA_ILSR3	(PA_FPGA + 0x04)

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#define FPGA_ILSR4	(PA_FPGA + 0x05)

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#define FPGA_ILSR5	(PA_FPGA + 0x06)

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#define FPGA_ILSR6	(PA_FPGA + 0x07)

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#define FPGA_ILSR7	(PA_FPGA + 0x08)

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#define FPGA_ILSR8	(PA_FPGA + 0x09)

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void init_se7721_IRQ(void);

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#define __IO_PREFIX		se7721

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#include <asm/io_generic.h>

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#endif  /* __ASM_SH_SE7721_H */

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