Path: blob/master/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
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/*1* arch/sh/kernel/cpu/sh4a/clock-sh7770.c2*3* SH7770 support for the clock framework4*5* Copyright (C) 2005 Paul Mundt6*7* This file is subject to the terms and conditions of the GNU General Public8* License. See the file "COPYING" in the main directory of this archive9* for more details.10*/11#include <linux/init.h>12#include <linux/kernel.h>13#include <asm/clock.h>14#include <asm/freq.h>15#include <asm/io.h>1617static int ifc_divisors[] = { 1, 1, 1, 1, 1, 1, 1, 1 };18static int bfc_divisors[] = { 1, 1, 1, 1, 1, 8,12, 1 };19static int pfc_divisors[] = { 1, 8, 1,10,12,16, 1, 1 };2021static void master_clk_init(struct clk *clk)22{23clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f];24}2526static struct clk_ops sh7770_master_clk_ops = {27.init = master_clk_init,28};2930static unsigned long module_clk_recalc(struct clk *clk)31{32int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f);33return clk->parent->rate / pfc_divisors[idx];34}3536static struct clk_ops sh7770_module_clk_ops = {37.recalc = module_clk_recalc,38};3940static unsigned long bus_clk_recalc(struct clk *clk)41{42int idx = (__raw_readl(FRQCR) & 0x000f);43return clk->parent->rate / bfc_divisors[idx];44}4546static struct clk_ops sh7770_bus_clk_ops = {47.recalc = bus_clk_recalc,48};4950static unsigned long cpu_clk_recalc(struct clk *clk)51{52int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f);53return clk->parent->rate / ifc_divisors[idx];54}5556static struct clk_ops sh7770_cpu_clk_ops = {57.recalc = cpu_clk_recalc,58};5960static struct clk_ops *sh7770_clk_ops[] = {61&sh7770_master_clk_ops,62&sh7770_module_clk_ops,63&sh7770_bus_clk_ops,64&sh7770_cpu_clk_ops,65};6667void __init arch_init_clk_ops(struct clk_ops **ops, int idx)68{69if (idx < ARRAY_SIZE(sh7770_clk_ops))70*ops = sh7770_clk_ops[idx];71}72737475