Path: blob/master/arch/sh/kernel/cpu/sh5/setup-sh5.c
17451 views
/*1* SH5-101/SH5-103 CPU Setup2*3* Copyright (C) 2009 Paul Mundt4*5* This file is subject to the terms and conditions of the GNU General Public6* License. See the file "COPYING" in the main directory of this archive7* for more details.8*/9#include <linux/platform_device.h>10#include <linux/init.h>11#include <linux/serial.h>12#include <linux/serial_sci.h>13#include <linux/io.h>14#include <linux/mm.h>15#include <linux/sh_timer.h>16#include <asm/addrspace.h>1718static struct plat_sci_port scif0_platform_data = {19.mapbase = PHYS_PERIPHERAL_BLOCK + 0x01030000,20.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,21.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,22.scbrr_algo_id = SCBRR_ALGO_2,23.type = PORT_SCIF,24.irqs = { 39, 40, 42, 0 },25};2627static struct platform_device scif0_device = {28.name = "sh-sci",29.id = 0,30.dev = {31.platform_data = &scif0_platform_data,32},33};3435static struct resource rtc_resources[] = {36[0] = {37.start = PHYS_PERIPHERAL_BLOCK + 0x01040000,38.end = PHYS_PERIPHERAL_BLOCK + 0x01040000 + 0x58 - 1,39.flags = IORESOURCE_IO,40},41[1] = {42/* Period IRQ */43.start = IRQ_PRI,44.flags = IORESOURCE_IRQ,45},46[2] = {47/* Carry IRQ */48.start = IRQ_CUI,49.flags = IORESOURCE_IRQ,50},51[3] = {52/* Alarm IRQ */53.start = IRQ_ATI,54.flags = IORESOURCE_IRQ,55},56};5758static struct platform_device rtc_device = {59.name = "sh-rtc",60.id = -1,61.num_resources = ARRAY_SIZE(rtc_resources),62.resource = rtc_resources,63};6465#define TMU_BLOCK_OFF 0x0102000066#define TMU_BASE PHYS_PERIPHERAL_BLOCK + TMU_BLOCK_OFF67#define TMU0_BASE (TMU_BASE + 0x8 + (0xc * 0x0))68#define TMU1_BASE (TMU_BASE + 0x8 + (0xc * 0x1))69#define TMU2_BASE (TMU_BASE + 0x8 + (0xc * 0x2))7071static struct sh_timer_config tmu0_platform_data = {72.channel_offset = 0x04,73.timer_bit = 0,74.clockevent_rating = 200,75};7677static struct resource tmu0_resources[] = {78[0] = {79.start = TMU0_BASE,80.end = TMU0_BASE + 0xc - 1,81.flags = IORESOURCE_MEM,82},83[1] = {84.start = IRQ_TUNI0,85.flags = IORESOURCE_IRQ,86},87};8889static struct platform_device tmu0_device = {90.name = "sh_tmu",91.id = 0,92.dev = {93.platform_data = &tmu0_platform_data,94},95.resource = tmu0_resources,96.num_resources = ARRAY_SIZE(tmu0_resources),97};9899static struct sh_timer_config tmu1_platform_data = {100.channel_offset = 0x10,101.timer_bit = 1,102.clocksource_rating = 200,103};104105static struct resource tmu1_resources[] = {106[0] = {107.start = TMU1_BASE,108.end = TMU1_BASE + 0xc - 1,109.flags = IORESOURCE_MEM,110},111[1] = {112.start = IRQ_TUNI1,113.flags = IORESOURCE_IRQ,114},115};116117static struct platform_device tmu1_device = {118.name = "sh_tmu",119.id = 1,120.dev = {121.platform_data = &tmu1_platform_data,122},123.resource = tmu1_resources,124.num_resources = ARRAY_SIZE(tmu1_resources),125};126127static struct sh_timer_config tmu2_platform_data = {128.channel_offset = 0x1c,129.timer_bit = 2,130};131132static struct resource tmu2_resources[] = {133[0] = {134.start = TMU2_BASE,135.end = TMU2_BASE + 0xc - 1,136.flags = IORESOURCE_MEM,137},138[1] = {139.start = IRQ_TUNI2,140.flags = IORESOURCE_IRQ,141},142};143144static struct platform_device tmu2_device = {145.name = "sh_tmu",146.id = 2,147.dev = {148.platform_data = &tmu2_platform_data,149},150.resource = tmu2_resources,151.num_resources = ARRAY_SIZE(tmu2_resources),152};153154static struct platform_device *sh5_early_devices[] __initdata = {155&scif0_device,156&tmu0_device,157&tmu1_device,158&tmu2_device,159};160161static struct platform_device *sh5_devices[] __initdata = {162&rtc_device,163};164165static int __init sh5_devices_setup(void)166{167int ret;168169ret = platform_add_devices(sh5_early_devices,170ARRAY_SIZE(sh5_early_devices));171if (unlikely(ret != 0))172return ret;173174return platform_add_devices(sh5_devices,175ARRAY_SIZE(sh5_devices));176}177arch_initcall(sh5_devices_setup);178179void __init plat_early_device_setup(void)180{181early_platform_add_devices(sh5_early_devices,182ARRAY_SIZE(sh5_early_devices));183}184185186