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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/sh/lib/udiv_qrnnd.S
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/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,

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   2004, 2005, 2006

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   Free Software Foundation, Inc.

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This file is free software; you can redistribute it and/or modify it

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under the terms of the GNU General Public License as published by the

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Free Software Foundation; either version 2, or (at your option) any

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later version.

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In addition to the permissions in the GNU General Public License, the

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Free Software Foundation gives you unlimited permission to link the

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compiled version of this file into combinations with other programs,

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and to distribute those combinations without any restriction coming

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from the use of this file.  (The General Public License restrictions

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do apply in other respects; for example, they cover modification of

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the file, and distribution when not linked into a combine

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executable.)

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This file is distributed in the hope that it will be useful, but

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WITHOUT ANY WARRANTY; without even the implied warranty of

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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU

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General Public License for more details.

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You should have received a copy of the GNU General Public License

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along with this program; see the file COPYING.  If not, write to

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the Free Software Foundation, 51 Franklin Street, Fifth Floor,

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Boston, MA 02110-1301, USA.  */

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!! libgcc routines for the Renesas / SuperH SH CPUs.

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!! Contributed by Steve Chamberlain.

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!! sac@cygnus.com

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!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines

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!! recoded in assembly by Toshiyasu Morita

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!! tm@netcom.com

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/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and

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   ELF local label prefixes by J"orn Rennecke

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   [email protected]  */

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	/* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */

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	/* n1 < d, but n1 might be larger than d1.  */

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	.global __udiv_qrnnd_16

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	.balign 8

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__udiv_qrnnd_16:

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	div0u

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	cmp/hi r6,r0

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	bt .Lots

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	.rept 16

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	div1 r6,r0 

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	.endr

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	extu.w r0,r1

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	bt 0f

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	add r6,r0

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0:	rotcl r1

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	mulu.w r1,r5

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	xtrct r4,r0

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	swap.w r0,r0

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	sts macl,r2

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	cmp/hs r2,r0

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	sub r2,r0

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	bt 0f

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	addc r5,r0

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	add #-1,r1

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	bt 0f

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1:	add #-1,r1

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	rts

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	add r5,r0

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	.balign 8

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.Lots:

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	sub r5,r0

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	swap.w r4,r1

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	xtrct r0,r1

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	clrt

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	mov r1,r0

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	addc r5,r0

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	mov #-1,r1

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	bf/s 1b

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	 shlr16 r1

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0:	rts

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	 nop

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