/*1* dtlb_prot.S: DTLB protection trap strategy.2* This is included directly into the trap table.3*4* Copyright (C) 1996,1998 David S. Miller ([email protected])5* Copyright (C) 1997,1998 Jakub Jelinek ([email protected])6*/78/* Ways we can get here:9*10* [TL == 0] 1) User stores to readonly pages.11* [TL == 0] 2) Nucleus stores to user readonly pages.12* [TL > 0] 3) Nucleus stores to user readonly stack frame.13*/1415/* PROT ** ICACHE line 1: User DTLB protection trap */16mov TLB_SFSR, %g117stxa %g0, [%g1] ASI_DMMU ! Clear FaultValid bit18membar #Sync ! Synchronize stores19rdpr %pstate, %g5 ! Move into alt-globals20wrpr %g5, PSTATE_AG|PSTATE_MG, %pstate21rdpr %tl, %g1 ! Need a winfixup?22cmp %g1, 1 ! Trap level >1?23mov TLB_TAG_ACCESS, %g4 ! For reload of vaddr2425/* PROT ** ICACHE line 2: More real fault processing */26bgu,pn %xcc, winfix_trampoline ! Yes, perform winfixup27ldxa [%g4] ASI_DMMU, %g5 ! Put tagaccess in %g528ba,pt %xcc, sparc64_realfault_common ! Nope, normal fault29mov FAULT_CODE_DTLB | FAULT_CODE_WRITE, %g430nop31nop32nop33nop3435/* PROT ** ICACHE line 3: Unused... */36nop37nop38nop39nop40nop41nop42nop43nop4445/* PROT ** ICACHE line 4: Unused... */46nop47nop48nop49nop50nop51nop52nop53nop545556