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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/sparc/kernel/ivec.S
10818 views
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	/* The registers for cross calls will be:

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	 *

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	 * DATA 0: [low 32-bits]  Address of function to call, jmp to this

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	 *         [high 32-bits] MMU Context Argument 0, place in %g5

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	 * DATA 1: Address Argument 1, place in %g1

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	 * DATA 2: Address Argument 2, place in %g7

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	 *

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	 * With this method we can do most of the cross-call tlb/cache

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	 * flushing very quickly.

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	 */

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	.align		32

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	.globl		do_ivec

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	.type		do_ivec,#function

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do_ivec:

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	mov		0x40, %g3

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	ldxa		[%g3 + %g0] ASI_INTR_R, %g3

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	sethi		%hi(KERNBASE), %g4

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	cmp		%g3, %g4

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	bgeu,pn		%xcc, do_ivec_xcall

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	 srlx		%g3, 32, %g5

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	stxa		%g0, [%g0] ASI_INTR_RECEIVE

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	membar		#Sync

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	sethi		%hi(ivector_table_pa), %g2

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	ldx		[%g2 + %lo(ivector_table_pa)], %g2

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	sllx		%g3, 4, %g3

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	add		%g2, %g3, %g3

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	TRAP_LOAD_IRQ_WORK_PA(%g6, %g1)

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	ldx		[%g6], %g5

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	stxa		%g5, [%g3] ASI_PHYS_USE_EC

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	stx		%g3, [%g6]

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	wr		%g0, 1 << PIL_DEVICE_IRQ, %set_softint

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	retry

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do_ivec_xcall:

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	mov		0x50, %g1

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	ldxa		[%g1 + %g0] ASI_INTR_R, %g1

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	srl		%g3, 0, %g3

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	mov		0x60, %g7

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	ldxa		[%g7 + %g0] ASI_INTR_R, %g7

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	stxa		%g0, [%g0] ASI_INTR_RECEIVE

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	membar		#Sync

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	ba,pt		%xcc, 1f

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	 nop

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	.align		32

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1:	jmpl		%g3, %g0

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	 nop

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	.size		do_ivec,.-do_ivec

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