#include <asm-generic/vmlinux.lds.h>1#include <asm/page.h>2#include <asm/cache.h>3#include <asm/thread_info.h>4#include <hv/hypervisor.h>56/* Text loads starting from the supervisor interrupt vector address. */7#define TEXT_OFFSET MEM_SV_INTRPT89OUTPUT_ARCH(tile)10ENTRY(_start)11jiffies = jiffies_64;1213PHDRS14{15intrpt1 PT_LOAD ;16text PT_LOAD ;17data PT_LOAD ;18}19SECTIONS20{21/* Text is loaded with a different VA than data; start with text. */22#undef LOAD_OFFSET23#define LOAD_OFFSET TEXT_OFFSET2425/* Interrupt vectors */26.intrpt1 (LOAD_OFFSET) : AT ( 0 ) /* put at the start of physical memory */27{28_text = .;29_stext = .;30*(.intrpt1)31} :intrpt1 =03233/* Hypervisor call vectors */34#include "hvglue.lds"3536/* Now the real code */37. = ALIGN(0x20000);38.text : AT (ADDR(.text) - LOAD_OFFSET) {39HEAD_TEXT40SCHED_TEXT41LOCK_TEXT42__fix_text_end = .; /* tile-cpack won't rearrange before this */43TEXT_TEXT44*(.text.*)45*(.coldtext*)46*(.fixup)47*(.gnu.warning)48} :text =049_etext = .;5051/* "Init" is divided into two areas with very different virtual addresses. */52INIT_TEXT_SECTION(PAGE_SIZE)5354/* Now we skip back to PAGE_OFFSET for the data. */55. = (. - TEXT_OFFSET + PAGE_OFFSET);56#undef LOAD_OFFSET57#define LOAD_OFFSET PAGE_OFFSET5859. = ALIGN(PAGE_SIZE);60VMLINUX_SYMBOL(_sinitdata) = .;61INIT_DATA_SECTION(16) :data =062PERCPU_SECTION(L2_CACHE_BYTES)63. = ALIGN(PAGE_SIZE);64VMLINUX_SYMBOL(_einitdata) = .;6566_sdata = .; /* Start of data section */6768RO_DATA_SECTION(PAGE_SIZE)6970/* initially writeable, then read-only */71. = ALIGN(PAGE_SIZE);72__w1data_begin = .;73.w1data : AT(ADDR(.w1data) - LOAD_OFFSET) {74VMLINUX_SYMBOL(__w1data_begin) = .;75*(.w1data)76VMLINUX_SYMBOL(__w1data_end) = .;77}7879RW_DATA_SECTION(L2_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)8081_edata = .;8283EXCEPTION_TABLE(L2_CACHE_BYTES)84NOTES858687BSS_SECTION(8, PAGE_SIZE, 1)88_end = . ;8990STABS_DEBUG91DWARF_DEBUG9293DISCARDS94}959697